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Three-dimensional transformer

A transformer, three-dimensional technology, applied in the direction of transformers, fixed transformers, transformers/inductor coils/windings/connections, etc., can solve the problems of not meeting the requirements, the area occupied by the transformer is too large, etc., to save chip area and improve coupling rate effect

Active Publication Date: 2008-11-19
UNITED MICROELECTRONICS CORP +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, with the miniaturization of components, the area occupied by traditional planar transformers is too large to meet the needs

Method used

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  • Three-dimensional transformer
  • Three-dimensional transformer
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Embodiment Construction

[0039] FIG. 1 is a schematic diagram of a three-dimensional transformer according to an embodiment of the present invention. FIG. 2 is a schematic diagram illustrating a first coil of the three-dimensional transformer shown in FIG. 1 . FIG. 3 is a schematic diagram illustrating a second coil of the three-dimensional transformer shown in FIG. 1 .

[0040] Referring to FIG. 1 , the three-dimensional transformer 10 of this embodiment is disposed on a semiconductor substrate 10 , and includes a first coil 100 and a second coil 200 .

[0041] Referring to FIG. 1 and FIG. 2 , the first coil 100 includes a first port 102 , a second port 104 and a multilayer first metal wire 106 . The multilayer first metal lines 106 include a top first metal line 110 , a plurality of middle first metal lines 120 and a bottom first metal line 150 , which are insulated from each other by a dielectric layer 12 such as silicon oxide.

[0042] Referring to FIG. 2, in the first coil 100, the first end 11...

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Abstract

The present invention discloses a three-dimensional transformer, which comprises a first coil and a second coil. Each coil comprises a first port, a second port, a top metal wire, a plurality of internal surrounding metal wires arranged at an intermediate layer, a plurality of external surrounding metal wires arranged at the intermediate layer, and a bottom metal wire. The metal wires at all layers of the first loop and the metal wires at the layers of the second loop are arranged corresponding to each other and are alternately stacked up in the z direction. The first port of each loop is connected with the top metal wire; the top metal wire, the internal surrounding metal wires and the first end of the bottom metal wire of each loop are electrically connected into a line which runs downwards in clockwise direction; the second end of the bottom metal wire and the top external surrounding metal wire at the intermediate layer are electrically connected into a line which runs upwards in the same clockwise direction and then is connected with each second port.

Description

technical field [0001] The invention relates to a radio frequency integrated circuit element, in particular to a three-dimensional transformer. Background technique [0002] In recent years, the popularization and convenience of wireless communication have made the demand for radio frequency integrated circuits more and more high. In the design of complementary metal-oxide-semiconductor (CMOS) radio frequency circuits, in addition to the high-frequency characteristics of active components that are difficult to grasp, inductance is also an important component. Since the CMOS substrate is a high-loss substrate, it is quite difficult to grasp the inductance characteristics. The inductance structure used in traditional CMOS radio frequency circuits is inherited from the planar structure used in GaAs circuits. Its disadvantage is that the area is too large, which will cause the designed radio frequency circuit to be too large in area and increase the cost. [0003] Transformers...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01F30/06H01F27/28
Inventor 许恒铭黄国勋
Owner UNITED MICROELECTRONICS CORP