Method for manufacturing fast flash memory with coupling rate increased

Abstract

The prewent invention discloses a manufacture method for flash memory to increasethe coupling ratio, which first defines two isolation structures projected above the surface of semiconductor substrate and then executes ion implanting so as to form adoping region on the semiconductor substrate at two sides of the isolation structure as well as forms dielectric isolation part at the side wall of two projected isolation structures, and at least, forms tunnelling dielectric layer and floating grid between the dielectric isolation parts in sequence to make the lower surface area of the floating grid smaller than the upper surface area of it for increasing the capacity coupling ratio.

Description

technical field [0001] The invention relates to a manufacturing method of a storage element, especially a manufacturing method of a flash memory, which has a high coupling rate and increases the efficiency of programming and erasing. Background technique [0002] With the development of semiconductor process technology, flash memory with faster access speed has been developed in storage devices, which has separate gates of control gate and floating gate, and in order to save circuit layout space , Usually every two bits share a source / drain for writing, reading and erasing operations. On the other hand, in the production of flash memory nowadays, the isolation technology of shallow trench isolation (STI) is used to replace the traditional local oxidation of silicon (LOCOS) to isolate the active area (OD). In order to realize the purpose of reducing the size of the storage device, and then effectively improve the integration degree of the semiconductor device. [0003] fig...

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Problems solved by technology

Increased coupling rate is limited

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