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Array processing system supporting asynchronous transmission and its clock management method

An array processing and asynchronous transmission technology, applied in data processing power supply, electrical digital data processing, instruments, etc., can solve the problems of design difficulties, clock propagation and distribution circuits consume large power consumption and circuit area, and achieve the effect of reducing power consumption

Inactive Publication Date: 2008-12-10
PEKING UNIV SHENZHEN GRADUATE SCHOOL
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  • Application Information

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Problems solved by technology

For a fully synchronous ultra-large-scale design, the clock propagation distribution circuit consumes a lot of power consumption and circuit area, which brings difficulties to the design

Method used

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  • Array processing system supporting asynchronous transmission and its clock management method
  • Array processing system supporting asynchronous transmission and its clock management method
  • Array processing system supporting asynchronous transmission and its clock management method

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Embodiment Construction

[0039] The features and advantages of the present invention will be described in detail with reference to the accompanying drawings.

[0040] The array processing system includes at least one pair of interconnected data sender and data receiver. The data sender and data receiver are relative terms. The data sender refers to the party that sends data in this data transmission, and the data receiver refers to The party receiving the data in this data transfer. Therefore, what is the sender of data in one data transfer may be the receiver of data in another data transfer, and vice versa. In an array processing system, the data sender can be a processing unit that mainly carries computing functions, or a communication node that mainly carries data transmission between processing units. Similarly, the data receiver can be a processing unit or a communication node. node. In data transmission, the processing unit that is the source of data transmission is called the source processi...

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Abstract

The present invention discloses an array processing system which supports asynchronous transmission, which comprises at least one pair of interconnected data sender and data receiver. The data sender and the data receiver respectively comprise a clock circuit for providing clock to self. The data is sent and received according to the asynchronous communication mode between the data sender and the data receiver. The present invention also discloses a clock management method used for the array processing system. The present invention supports the global asynchronous and local synchronous clock proposals and achieves the cross-clock-domain asynchronous data transmission through arranging different clock domains in all processing units and communication nodes in the array processing system. All processing units and communication nodes can work according the clock frequency which is consistent with the performance and the task so as to reduce the power consumption.

Description

technical field [0001] The invention relates to the field of integrated circuit design, in particular to an array processing system supporting asynchronous transmission and a clock management method thereof. Background technique [0002] The array processing system emerges in response to the continuous improvement of task processing performance and the rapid change of task algorithms. The processor array interconnected by the on-chip network has more flexible resource scheduling capabilities. Through parallel execution of programs, processing power is increased. In the design of array system and network on chip, power consumption is a very prominent design challenge. The design scale of these chip systems is very large. While the processing capacity of the array is improved, the management of power consumption has become a difficult point in the design. The existing synchronous clock scheme is difficult to control the rapidly increasing power consumption. Especially in dee...

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F15/173G06F1/32
Inventor 戴鹏王新安魏来刘彦亮黄维周丹叶兆华
Owner PEKING UNIV SHENZHEN GRADUATE SCHOOL