Instruction coding method, instruction coding system and digital signal processor

A technology of instruction encoding and digital signal, which is applied in the field of instruction set architecture, can solve the problem of limiting multiple instructions in parallel, and achieve the effect of reducing code length, high code compression rate, performance and power consumption optimization

Inactive Publication Date: 2009-03-11
SHANGHAI MAGIMA DIGITAL INFORMATION
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

In the ultra-long instruction word system, multiple parallel instructions can be issued at one time. For the instruction system that only contains two lengths of 16-

Method used

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  • Instruction coding method, instruction coding system and digital signal processor
  • Instruction coding method, instruction coding system and digital signal processor
  • Instruction coding method, instruction coding system and digital signal processor

Examples

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Embodiment Construction

[0040] According to an embodiment of the present invention, see figure 1 , the instruction encoding system 111 and data of the digital signal processor (DSP) are respectively stored in the storage unit 11 and transmitted via the bus. The control unit 12 fetches instructions from the storage unit 11 and decodes the instructions, and then the execution unit 13 fetches data from the storage unit 11 to perform operations according to the decoded instructions. The execution unit 13 includes two access units 131 , 132 and a calculation unit 133 , the two access units 131 and 132 can simultaneously perform data access operations; the calculation unit 133 performs calculations on the retrieved data. Since the calculation instructions that may be processed by the digital signal processor are relatively complex, an address generation unit (not shown) may also be provided in the digital signal processor to perform address calculations. The address generation unit in the present inventio...

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PUM

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Abstract

An instruction coding method and an instruction coding system comprise: an accessing operation instruction and a calculating operation instruction which are based on long immediate values are compressed to 32-bit length to be taken as a first instruction; the accessing operation instruction that is not based on the long immediate values is compressed to 16-bit length to be taken as a second instruction; the calculating operation instruction which is not based on the long immediate values is compressed to 24-bit length to be taken as a third instruction; according to the instruction coding method and the system thereof, a program control instruction which is based on the long immediate values can also be compressed to the 32-bit length to be taken as the first instruction; the program control instruction which is not based on the long immediate values is compressed to the 16-bit length to be taken as the second instruction. A digital signal processor of the invention comprises the instruction coding system. As three instruction lengths, namely, 16-bit length, 24-bit length and 32-bit length, are adopted to carry out variable-length instruction coding, a quite high code compression ratio is obtained and the length of codes is obviously reduced.

Description

technical field [0001] The invention relates to an instruction set architecture, in particular to an instruction encoding method, an instruction encoding system and a digital signal processor adopting the instruction encoding system. Background technique [0002] In the processor, the controller usually fetches instructions from the program memory, and after decoding, sends corresponding control signals to the data path and memory, etc., to fetch the corresponding data and execute the decoded instructions. Processors need to utilize specific combinations of instructions to complete the required application. In addition to occupying memory, storing instruction codes also requires cache, which will have an impact on chip area. Especially for a single-chip system, the chip area is one of the most important factors that directly determine the cost, and the coding efficiency of the instruction set code is a very important problem in the design. Moreover, power consumption is re...

Claims

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Application Information

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IPC IPC(8): G06F9/30G06F9/318G06F9/38
Inventor 周振亚张亚林
Owner SHANGHAI MAGIMA DIGITAL INFORMATION
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