Instruction coding method, instruction coding system and digital signal processor

Abstract

An instruction coding method and an instruction coding system comprise: an accessing operation instruction and a calculating operation instruction which are based on long immediate values are compressed to 32-bit length to be taken as a first instruction; the accessing operation instruction that is not based on the long immediate values is compressed to 16-bit length to be taken as a second instruction; the calculating operation instruction which is not based on the long immediate values is compressed to 24-bit length to be taken as a third instruction; according to the instruction coding method and the system thereof, a program control instruction which is based on the long immediate values can also be compressed to the 32-bit length to be taken as the first instruction; the program control instruction which is not based on the long immediate values is compressed to the 16-bit length to be taken as the second instruction. A digital signal processor of the invention comprises the instruction coding system. As three instruction lengths, namely, 16-bit length, 24-bit length and 32-bit length, are adopted to carry out variable-length instruction coding, a quite high code compression ratio is obtained and the length of codes is obviously reduced.

Description

technical field [0001] The invention relates to an instruction set architecture, in particular to an instruction encoding method, an instruction encoding system and a digital signal processor adopting the instruction encoding system. Background technique [0002] In the processor, the controller usually fetches instructions from the program memory, and after decoding, sends corresponding control signals to the data path and memory, etc., to fetch the corresponding data and execute the decoded instructions. Processors need to utilize specific combinations of instructions to complete the required application. In addition to occupying memory, storing instruction codes also requires cache, which will have an impact on chip area. Especially for a single-chip system, the chip area is one of the most important factors that directly determine the cost, and the coding efficiency of the instruction set code is a very important problem in the design. Moreover, power consumption is re...

AI Technical Summary

Problems solved by technology

In the ultra-long instruction word system, multiple parallel instructions can be issued at one time. For the instruction system that only contains two lengths of 16-bit and 32-bit, in order to ensure sufficient instruction types, most instruction lengths need to be coded in 32-bit. Limits the parallelism of multiple instructions

Images