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Transformation of an input signal into a logical output voltage level with a hysteresis behavior

A voltage level and input signal technology, applied in logic circuits, logic circuit coupling/interface using field effect transistors, logic circuit threshold modification, etc., can solve problems such as limited hysteresis behavior, multiple triggering of flip-flop circuits, etc., and achieve improvement The effect of hysteresis

Inactive Publication Date: 2009-03-11
NXP BV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, the disclosed CMOS Schmitt trigger circuit exhibits the disadvantage of limited hysteresis behavior especially at low operating voltage Vcc such that noisy input signals may cause multiple triggering of the flip-flop circuit

Method used

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  • Transformation of an input signal into a logical output voltage level with a hysteresis behavior
  • Transformation of an input signal into a logical output voltage level with a hysteresis behavior
  • Transformation of an input signal into a logical output voltage level with a hysteresis behavior

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Embodiment Construction

[0048] Fig. 1 shows a circuit diagram representing an electronic circuit arrangement 100 for converting an input signal into a logic output voltage level. Since the circuit arrangement 100 can be used as an input stage for various different logic devices, the circuit arrangement 100 is also referred to as an input cell.

[0049] The input unit 100 includes a first conductor 101 providing an operating voltage Vcc. The input unit 100 also comprises a second conductor 102 providing a reference voltage, which according to the embodiments described here is at ground level gnd. Although the two conductors 101 and 102 are not depicted as a continuous conductor path, each portion of the two conductors 101 and 102 shown in FIG. 1 is electrically connected to other portions belonging to the same conductor, respectively.

[0050] The circuit arrangement 100 is subdivided into different circuit parts. The ESD protection section 110 is arranged after the input terminal 105 representing t...

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Abstract

It is described a circuit and a method for transforming an input signal into a logical output. The circuit (100) comprises an inverter stage (120), connected in between the first conductor (101) and the second conductor (102). The inverter stage (120) includes a MOS switch (MP0), which comprises a first terminal being connected to the first conductor (101), a second terminal being connected to an output node (hyst), a gate terminal being connected to an input node (JN), and a back gate terminal. The circuit (100) further comprises a voltage divider (130), connected in between the first conductor (101) and the output node (hyst), wherein the voltage divider (130) provides a divider output node (bg) being connected to the back gate terminal. The circuit (100) represents an input cell having an improved hysteresis behavior over the total operating voltage range. This is achieved by adjusting the back gate voltage of the MOS switch (MP0) during a transition from an input level Low to an input level High. This causes a temporarily increased threshold voltage for turning off the MOS switch (MP0) during the transition.

Description

technical field [0001] The invention relates to the field of electronic circuits that perform a conversion from an input signal representing an input voltage level to a logical output voltage level. In particular, the invention relates to electronic circuits in which the logic output voltage level includes hysteretic behavior when the input signal performs a sweep change over a voltage range representing a plurality of possible input voltage levels. Background technique [0002] Noise immunity and stability are important criteria during the design of digital circuits and systems. For example, an input digital signal containing noise sent to a digital switching circuit may cause the digital switching circuit to transition to a different state due to the noise rather than due to the information content of the signal. To prevent multiple triggering of digital circuits and provide noise immunity, digital switching circuits typically employ hysteresis behavior. Typically, circu...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H03K19/00H03K19/0185H03K3/3565
CPCH03K19/0027H03K19/018521H03K2217/0018
Inventor 阿尔伯特·惠清洛·赫夫纳格尔蒂埃里·简斯
Owner NXP BV
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