Method for manufacturing high-frequency integrated circuit encapsulation structure

Abstract

The invention relates to a method for manufacturing a high-frequency integrated circuit encapsulation structure. The method comprises the steps as follows: a baseplate is provided with a first surface, a second surface and a plurality of projection containing holes; a plurality of inscribed gaskets are arranged corresponding to the projection containing holes; a chip is provided and is arranged onthe first surface of the baseplate; the chip is provided with an active surface; a plurality of heightened projections are arranged on the active surface of the chip and are contained in the projection containing holes to be adjacent to the inscribed gaskets; a plurality of flatted projections are combined with the heightened projections and are connected with the inscribed gaskets in electric connection; and a plurality of external terminals are arranged on the second surface of the baseplate. Therefore, the flatted projections are combined with the projections of the chip and can be in electric connection with the inscribed gaskets, so that the high-frequency integrated circuit encapsulation structure has the advantages of short electrical conduction route and light and small size.

Description

[0001] This application is a divisional application of the original application number 2006101112387, the application date was August 15, 2006, and the title of the invention is "high-frequency integrated circuit packaging structure and its manufacturing method". technical field [0002] The invention relates to an integrated circuit packaging technology, in particular to a manufacturing method of a high-frequency integrated circuit packaging structure with the advantages of short electrical conduction paths and lightness, thinness and miniaturization. Background technique [0003] The current integrated circuit chip is developing towards high-frequency transmission speed. If the electrical interconnection between the chip and the carrier inside the chip packaging structure adopts the traditional wire-bonding packaging technology, the electrical conduction path will be too long, and the high-frequency design will be lost. significance. For example, the early synchronous dyna...

AI Technical Summary

Problems solved by technology

However, in the so-called flip-chip bonding technology, the chip is prefabricated with bumps, flipped and hot-pressed to a substrate, and the existing packaging process equipment such as die bonder and wire bonder cannot be used. Such new equipment is not only expensive, but also And the allowable error of process parameters is very small

[0006] It can be seen that the above-mentioned existing integrated circuit packaging structure and its manufacturing method obviously still have inconvenience and defects in product structure, manufacturing method and use, and need to be further improved urgently.

In order to solve the above-mentioned problems, the relevant manufacturers have tried their best to find a solution, but no suitable design has been developed for a long time, and there is no suitable structure and method for general products and methods to solve the above-mentioned problems. This is obviously a problem that relevant industry players are eager to solve

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