Encapsulation structure for high frequency integrated circuit and its making method

Abstract

The utility model relates to a package structure of a high-frequency integrated circuit and the manufacturing method. The package structure of the high-frequency integrated circuit mainly comprises a pliability substrate with a projection accommodating hole, a projection chip, a plurality of flat projections and a plurality of external terminals; wherein, the external terminals are positioned on one surface of the flexibility substrate opposite to the projection chip arranged on the other surface of the pliability substrate. A plurality of inscribed pads are arranged in the pliability substrate. When the projections on the projection chip are arranged in the projection accommodating hole, the inscribed pads are adjacent to the projections on the chip. The flat projections can have electrical connection with the inscribed pads while the flat projections are combined with the projections on the chip, so that the utility model has the advantages of having a short path of the electrical conduction and being light, thin and short.

Description

technical field [0001] The invention relates to an integrated circuit packaging technology, in particular to a high-frequency integrated circuit packaging structure and a manufacturing method thereof with the advantages of short electrical conduction paths, lightness, thinness and miniaturization. Background technique [0002] The current integrated circuit chip is developing towards high-frequency transmission speed. If the electrical interconnection between the chip and the carrier inside the chip packaging structure adopts the traditional wire-bonding packaging technology, the electrical conduction path will be too long, and the high-frequency design will be lost. significance. For example, the early synchronous dynamic random access memory (SDRAM) memory is a package type of thin small outline package (Thin Small Outline Package, TSOP), and its chip carrier is a lead frame with external pins , and is electrically connected to the chip by bonding wires formed by bonding ...

AI Technical Summary

Problems solved by technology

However, in the so-called flip-chip bonding technology, the chip is prefabricated with bumps, flipped and hot-pressed to a substrate, and the existing packaging process equipment such as die bonder and wire bonder cannot be used. Such new equipment is not only expensive, but also And the allowable error of process parameters is very small

[0005] It can be seen that the above-mentioned existing integrated circuit packaging structure and its manufacturing method obviously still have inconvenience and defects in product structure, manufacturing method and use, and need to be further improved urgently.

In order to solve the above-mentioned problems, the relevant manufacturers have tried their best to find a solution, but no suitable design has been developed for a long time, and there is no suitable structure and method for general products and methods to solve the above-mentioned problems. This is obviously a problem that relevant industry players are eager to solve

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