Second level cache and kinetic energy switch access method

A cache, kinetic energy technology, applied in energy-saving computing, memory systems, energy-saving ICT and other directions, can solve problems such as current consumption

Inactive Publication Date: 2009-06-17
ALICORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, the use of the L2 cache also faces the problem of current consumption, so how to keep the processor in the system designed with the L2 cache at a high access speed without causing power consumption The situation where the flow is too large is the place that deserves further improvement

Method used

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  • Second level cache and kinetic energy switch access method
  • Second level cache and kinetic energy switch access method
  • Second level cache and kinetic energy switch access method

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Embodiment Construction

[0036] Please also refer to Figure 2A and Figure 2B , are respectively a schematic diagram of the data address packet of the central processing unit and a schematic diagram of the circuit architecture of an embodiment of the secondary cache architecture of the present invention. exist Figure 2A Among them, a central processing unit generates a 32-bit (bits) data address packet as a follow-up description, but it can also be changed according to its actual required bit data; the data address packet contains a label data (20 bits ) 201, an index data (8 bits) 202 and an offset data (4 bits) 203.

[0037] When the central processing unit processes data, it will first look for it in the cache. If the data is temporarily stored here because it has been read before, it does not need to read the data from the huge memory for a long time. And as Figure 2B As shown, the present invention provides a second-level high-speed cache (L2 Cache) 2 architecture, which is mainly when the...

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Abstract

A method for switching second level cache access by kenetic energy is applied for an applied system, wherein, the applied system comprises a central processing unit having a fist level cache. The method for switching access by kenetic energy comprises: firstly adjusting the frequency speed of the second level cache based on a power state of the central processing unit; then judging a ratio relation between the second level cache and the central processing unit; and switching the access mode of the second level cache based on the ratio relation. The frequency speed of the second level cache is larger than the frequency speed of the central processing unit on design. Thereby the purposes for maintaining the access efficiency of the central processing unit and reducing the access times of the second level cache can be reached, and the electricity-saving effect can be also reached.

Description

technical field [0001] The present invention relates to a method for kinetic energy switching memory access, in particular to a method for kinetic energy switching L2 cache (L2 Cache) access and its architecture. Background technique [0002] Please refer to figure 1 , is a schematic diagram of the architecture of a conventional bus application system. The bus application system 9 includes a system bus 90 , a central processing unit 91 , an image processor 92 , and a sound processor 93 . And bus application system 9 is except computer system, and other such as portable audio-visual device etc. also all can be designed with a kinetic energy random access memory (DRAM) 94 for placing temporary storage data, calculation result and program for each carrying processor source etc. However, this will often cause the controllers on the bus application system 9 to compete for the access right to the kinetic energy random access memory 94 , so that the performance of the entire sys...

Claims

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Application Information

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IPC IPC(8): G06F12/08G06F1/32G06F12/0877
CPCY02B60/1225Y02D10/00
Inventor 黄启庭
Owner ALICORP
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