Configurable convolution calculation circuit for convolutional neural network

Abstract

The invention discloses a configurable convolution calculation circuit for a convolutional neural network. The calculation control module unfolds triple cycles in quadruple cycle calculation of the convolutional layer, namely cycles in a receptive field, cycles among input feature maps and cycles among output feature maps; pixel data and weight data required by convolution calculation of each cycle are input into a convolution calculation module; the corresponding offset data is input into the adder tree module; the convolution calculation module carries out parallel calculation on the triple cycles in different directions at the same time; the addition tree module carries out addition calculation on different working modes, wherein the addition tree module comprises a single-channel mode and a multi-channel mode; and the calculation control module can switch the working mode of the adder tree module at any time according to whether the pixel data subjected to convolution calculation is single-channel data or multi-channel data, so that the utilization rate of circuit resources when the single-channel data is input is improved; therefore, the operation efficiency of the convolution calculation circuit is improved.

Description

technical field [0001] The invention belongs to the field of realizing artificial intelligence algorithm circuits, and more specifically relates to a configurable convolution calculation circuit for convolutional neural networks. Background technique [0002] With the development of computing power and the increase of data volume, various deep neural network models in artificial intelligence algorithms have been widely used in computer vision, biometric information, natural language processing and other fields. Information processing and other application scenarios have achieved unprecedented accuracy; however, in current application scenarios, convolutional neural networks have problems such as low computing efficiency and high energy consumption when using computing processing core CPUs and graphics processing unit GPU units. The energy efficiency of the forward reasoning of the convolutional neural network on the hardware side, the ASIC (application-specific integrated ci...

AI Technical Summary

Problems solved by technology

[0005] Aiming at the above defects or improvement needs of the prior art, the present invention provides a configurable convolutional computing circuit for convolutional neural networks to solve the technical problem of low utilization of hardware resources in the prior art

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