Memory device and its updating method

A memory, a technology to be updated, applied in the direction of static memory, digital memory information, information storage, etc., can solve problems affecting memory performance, etc.

Inactive Publication Date: 2009-08-05
IND TECH RES INST
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

While updating the memory, the external must stop accessing the memory, which affects the performance of the memory.

Method used

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  • Memory device and its updating method
  • Memory device and its updating method

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Embodiment Construction

[0092] In SoC circuit design, memory is an indispensable component. Compared with the static random access memory (SRAM) using six transistors, the dynamic random access memory (DRAM) is not only lower in cost and price, but also has a higher integration density. in SRAM. Since the DRAM needs to periodically update the stored data, the memory faces costs such as reduced work performance and increased power consumption caused by the update.

[0093] Before describing the implementation examples according to the present invention, it is assumed that the memory array update method and the update circuit of the present invention are update mechanisms applied to dynamic random access memory, so as to improve the working performance and reduce power consumption of the memory, but not limited thereto , can still be applied to other ranges, for example, it can also be applied to pseudo static random access memory (pseudo SRAM).

[0094] The present invention will be described below ...

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Abstract

The invention relates to a storage device and an update method, wherein the storage device includes a storage array, which contains a plurality of storage rows. When a receiving array refreshes the impulse, the storage device can be indicated whether to be updated according to the storage rows used by a plurality of label sign setting systems and by resetting the corresponding status of the storage rows. When the receiving rows refresh the impulse, whether the storage rows shall be updated depend on the parameters like the counter value of the rows to refresh, the counter value of the remaining refresh deadline and the acceptable value of the queue. When the storage row is to be refreshed, a preferred storage row is selected to refresh according to the label and the status, also the corresponding status can be set.

Description

technical field [0001] The invention relates to an updating method and an updating circuit of a memory array. Background technique [0002] With the evolution of the manufacturing process, in the highly integrated system single chip, the proportion of embedded memory is getting higher and higher. According to the survey, experts and scholars predict that in 2010, embedded memory will account for more than 60% of SOCs. Therefore, while increasing the density of the embedded memory, how to improve the performance of the memory and save power consumption has become an important issue nowadays. [0003] figure 1 An architectural diagram of a dynamic random access memory is shown. Please refer to figure 1 , the basic architecture of DRAM 100 includes a memory array (Memory Array) 110 arranged in an array form, a multiplexer (Multiplexer) 120, an access column address decoder (Row Address Decoder) 130, a row selector (Column Selector) 140, binary counter (Binary Counter) 150,...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G11C11/406
Inventor 林建宏李子芳王启龙
Owner IND TECH RES INST
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