Generating circuit of Golay complementary code
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[0025] The present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments.
[0026] The generation circuit of Gray's complementary code provided by the present invention comprises a counter 1, a memory 2, and a shift register 3, wherein the number of data bits in the memory 2 is M, and a code length of 2 is stored in advance in the memory 2. i Two groups of Gray code sequences that are Gray complementary codes, the size of the memory 2 is at least The number of bits in counter 1 is The number of data bits of the shift register 3 is also M;
[0027] The Clock pins of memory 2, counter 1, and shift register 3 all input the clock signal clk whose period is the symbol width, the data output end of counter 1 is connected with the address pin of memory 2, and the data output end of memory 2 is connected with the shift pin. The data input terminal of register 3 is connected, and the data output terminal of shift register ...
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