86results about "Pulse train generator" patented technology

The invention provides a multi-waveform magnetic field generating device for magnetic hyperthermia. The multi-waveform magnetic field generating device comprises a power supply module, a BUCK voltage regulating circuit, a multi-waveform signal generating circuit, a power amplifying circuit, a series resonance inverter circuit, an induction coil, a water cooling module, a temperature acquisition module, a DSP microprocessor and a TFT display screen. The power supply module is combined with BUCK to supply power to the device; the multi-waveform signal generation circuit, the power amplification circuit and the series resonance inverter circuit are used for generating an alternating magnetic field to act on a magnetic medium to generate a heat effect and realize magnetic hyperthermia; the water cooling module is used for reducing the temperature of the induction coil; the temperature acquisition module acquires temperature data of a treatment area and performs output control on the Buck voltage regulation circuit by using the DSP microprocessor so as to regulate the output power of the power amplification circuit powered by the BUCK voltage regulation circuit and realize intelligent temperature control of the magnetofluid; the problems that in the prior art, a magnetic field generation device is single in induction waveform and poor in heat generation effect are solved.

A system, method, and apparatus for adjusting ion energy in a plasma chamber to avoid excessive and damaging charge buildup on a substrate surface and in capacitive structures constructed on the surface includes placing a substrate in the plasma chamber, forming a plasma in the plasma chamber, controllably switching power to the substrate to apply a periodic voltage function (or a modified periodic voltage function) to the substrate, and modulating the periodic voltage function over multiple cycles of the periodic voltage function in response to a defined distribution of ion energy at the surface of the substrate to, on a time-averaged basis, produce the defined distribution of ion energies and maintain surface charge buildup below a threshold.

A safety grating expansion board and a detection circuit and method for the number of lamp beads are provided, the detection circuit comprises a main control module and at least one expansion module, and the main control module comprises a clock output end, a starting output end and a detection end; each expansion module comprises a pulse latch unit, a clock input end, a first data input end, a first data output end, a second data output end and a second data input end, the clock input end is used for receiving a clock pulse signal, the first data output end is used for outputting a first latch level according to a second latch level or a preset starting signal, and the second data output end is used for outputting a second latch level according to a preset starting signal. The second data output end is used for outputting a second latch level according to the first latch level, and the main control module is configured to determine the number of the expansion modules according to the output times of the clock pulse signals when the detection end recovers from the low level to the high level. According to the embodiment of the invention, the number of the expansion boards can be automatically detected in a production link, manual input errors are avoided, and repeated configuration processes are reduced.

The present invention discloses a square wave generator with adjustable duty cycle, which includes a comparator U1A and a comparator U1B. The pin 6 of the comparator U1B is electrically connected to the collector of a triode Q2, the pin 2 of the comparator U1A, one end of a capacitor C1 and the positive electrode of a diode D3. The other end of the capacitor C1 is grounded. The emitter of the triode Q2 is electrically connected to one end of a resistor R3, and the other end of the resistor R3 is electrically connected to the negative electrode of a diode D4 and an input power supply V1+. The base of the triode Q2 is electrically connected to the positive electrode of the diode D4 and one end of a resistor R4, and the other end of the resistor R4 is grounded. The square wave generated by the present invention is a positive voltage unipolarity, and the duty cycle can be automatically adjusted following the input voltage, and thus the duty cycle can be automatically adjusted following the feedback signal in specific occasions where it is required.

The present disclosure provides systems and methods for an output architecture for an implantable pulse generator of a neurostimulation system. The output architecture includes a power supply, a plurality of outputs, a global source current regulator coupled to the power supply and operable to source current from the power supply to the plurality of outputs through a plurality of source current branches, a global sink current regulator operable to sink current from the plurality of outputs to ground through a plurality of sink current branches, a current source branch selector operable to select, for each of the plurality of outputs, an amount of current sourced from the plurality of source current branches, and a current sink branch selector operable to select, for each of the plurality of outputs, an amount of current sunk to the plurality of sink current branches.

This application discloses a differential signal generation circuit. The differential signal generation circuit includes: an oscillator that generates multiple clock signals; a duty cycle adjustment module that adjusts the duty cycle of each clock signal to obtain multiple clock signals; and a logic module that provides phase-complementary differential signal pairs based on the multiple clock signals. The oscillator includes N stages of interconnected inverters, and the output ends of the N stages of inverters provide multiple clock signals, each with an initial phase difference. The differential signal generation circuit of this application has high precision and a simple circuit structure.

The application provides a radio frequency driving device and a radio frequency power supply system. The radio frequency driving device comprises an input end, an output end, N radio frequency driving units and a gating unit. The N radio frequency driving units are connected in parallel between the input end and the gating unit. The gating unit is connected between the N radio frequency driving units and the output end. The input end is used for connecting with a direct current power supply. The output end is used for connecting with a radio frequency generating device. Each radio frequency driving unit is used for receiving direct current power output by the direct current power supply through the input end and converting the direct current power into target power. The gating unit is used for selectively turning on the connection between one target radio frequency driving unit and the output end, so that the target power generated by the target radio frequency driving unit is output to the radio frequency generating device through the output end. The voltage values of the target power generated by the N radio frequency driving units are different from each other. The application can protect the radio frequency generating device.

Some embodiments include a high voltage waveform generator comprising: a generator inductor; a high voltage nanosecond pulser having one or more solid state switches electrically and / or inductively coupled with the generator inductor, the high voltage nanosecond pulser configured to produce a pulse burst having a burst period, the pulse burst comprising a plurality of pulses having different pulse widths; and a load electrically and / or inductively coupled with the high voltage nanosecond pulser, the generator inductor, and the generator capacitor, the voltage across the load having an output pulse with a pulse width substantially equal to the burst period and the voltage across the load varying in a manner that is substantially proportional with the pulse widths of the plurality of pulses.

The invention discloses a comb spectrum generator and electronic equipment. According to the comb spectrum generator, a bias module, an input matching module and a selection module are sequentially connected, the selection module is further connected with an odd comb spectrum generation module and an even comb spectrum generation module, and the odd comb spectrum generation module and the even comb spectrum generation module are both connected to an output matching module; the odd comb spectrum generation module comprises a first odd pulse generation unit, an odd intermediate matching unit and a second odd pulse generation unit which are connected in sequence; the bias module is used for providing bias voltage; the input matching module is used for performing impedance matching on an input signal; the selection module is used for controlling an input signal to be input to the odd comb spectrum generation module or the even comb spectrum generation module so as to generate odd harmonics or even harmonics; and the output matching module is used for carrying out impedance matching on odd harmonics or even harmonics. According to the comb spectrum generator provided by the embodiment of the invention, the applicability and the use flexibility of the comb spectrum generator can be improved.

A system configured to provide a non-thermal plasma from a variety of feed gases is described. The system includes a plasma applicator; a feed gas source providing a gas flow to the plasma applicator; a power supply configured to deliver electrical power via a transmission line to an electrode of the plasma applicator; a signal generator configured to provide a drive signal to the power supply; and a controller. The controller is configured to receive at least one input status parameter associated with a quality of plasma delivered by the plasma applicator; and provide at least one parameter value for at least one parameter defining an output signal waveform of the power supply. The at least one parameter value is taken from the group consisting of: duty factor, pulse rate, pulse width, pulse delay, pulse modulation and pulse shape.

A broadband impulse generator includes a first delay line and a second delay line that receive an input signal and include a plurality of delay elements connected in series with each other, an oscillation signal generator that generates an oscillation signal having a certain number of pulses during a target impulse duration based on the input signal and an output signal of the first delay line, an envelope signal generator that generates a plurality of envelope signals having a delay duration with each other and having a certain voltage level during the target impulse duration, based on the input signal and an output signal of the second delay line, and an impulse signal generator that generates an impulse signal having the certain number of pulses during the target impulse duration based on the plurality of impulse signals and the oscillation signal.

A method serves for operating a drive unit comprising an active element (1) having a resonator (2) and an excitation means (23) for exciting oscillations in the resonator (2) and thereby driving a passive element (4). The method comprises the steps of • driving the excitation means (23) with a driving signal, the driving signal being a periodic signal comprising driving pulses repeated with an excitation frequency; • depending on a control signal, modifying the driving signal by: o if the control signal is within a first range, modifying the excitation frequency or modifying the shape of the driving pulses, and o if the control signal is within a second range, repeatedly omitting driving pulses.

The invention discloses a square wave generating circuit which comprises an initial waveform circuit and a hysteresis comparator circuit, the initial waveform circuit is connected with the hysteresis comparator circuit, the initial waveform circuit is used for generating an initial square wave signal, and the hysteresis comparator circuit is used for generating a hysteresis comparator; an energy storage unit in the initial waveform circuit is charged or discharged according to the level state of the initial square wave signal, so that a first end of the energy storage unit generates an intermediate waveform signal; and the hysteresis comparator circuit is used for receiving the intermediate waveform signal, comparing the intermediate waveform signal with a preset threshold voltage, and generating a target square wave signal according to a comparison result. Therefore, the square wave generating circuit can improve the condition that the output waveform has clutters, and improves the signal quality of the target square wave signal.

In one embodiment, a pulse generating device for generating output pulses (P2) with pulse durations in the range of nanoseconds or shorter comprises a signal source (10) for providing an input current (11) comprising input pulses (P1) of an input pulse duration (P1); a pulse shortening circuit (20) coupled to the signal source (10), which has a delay line (21) and is configured to provide the output pulses (P2) based on the input current (11), wherein a pulse duration of the output pulses (P2) is shorter than the input pulse duration; and a heating source (30) coupled to the pulse shortening circuit (20) for providing a heating current (I2) for the delay line (21) of the pulse shortening circuit (20). The delay line (21) is designed to heat up to an at least substantially constant operating temperature using the heating current (I2).

To provide surface charge and power feedback as well as control using a switch mode bias system.SOLUTION: There are provided systems, methods and apparatus for regulating ion energies in a plasma chamber and avoiding excessive and damaging charge buildup on the substrate surface and within capacitive structures being built on the surface. An exemplary method includes placing a substrate in the plasma chamber, forming a plasma in the plasma chamber, controllably switching power to the substrate so as to apply a periodic voltage function (or a modified periodic voltage function) to the substrate, and modulating, over multiple cycles of the periodic voltage function, the periodic voltage function responsive to a defined distribution of energies of ions at the surface of the substrate so as to effectuate the defined distribution of ion energies on a time-averaged basis, and to maintain surface charge buildup below a threshold.SELECTED DRAWING: Figure 52

A stagger signal generation circuit is provided. The stagger signal generation circuit includes: a stagger pulse generation circuit, configured to generate a first pulse signal according to a first control signal and generate a second pulse signal according to a second control signal, the first control signal and the second control signal being inverted signals, and the first pulse signal and the second pulse signal being stagger pulse signals; and a delay signal output circuit including G signal output circuits, G being an integer greater than or equal to 2. Each non-first-stage signal output circuits receives a delay output signal outputted by a respective previous-stage signal output circuit as an input signal of a current-stage signal output circuit, and a first-stage signal output circuit receives an initial input signal as an input signal of the first-stage signal output circuit. The embodiments of this application generate a first pulse signal and a second pulse signal with adjustable periods, and generate a delay signal with a controllable delay according to the first pulse signal and the second pulse signal, and an area of a circuit layout is small, and the power consumption of the circuit is low.

A switching assembly for transferring trains of pulses, including a first terminal and a second terminal. A first plurality of first relays is connected in parallel, and have first contacts connected to the first assembly terminal, and second contacts. A first capacitor is connected in parallel with the first relays. A second plurality of second relays is connected in parallel, and have third contacts, and fourth contacts connected to the second assembly terminal. A second capacitor is connected in parallel with the second relays. A connection connects the second contacts to the third contacts. The pulses have amplitudes of at least 2 kilovolts. On activation of the first and second relays the first and second contacts connect and the third and fourth contacts connect, so that the first and second assembly terminals connect. On deactivation of the first and second relays the first and second assembly terminals disconnect.

The utility model provides a high-precision-based intervisibility weapon deduction system, relates to the technical field of weapon deduction, and provides a more real signal generation and processing scheme, which comprises a waveform simulation module, a data acquisition card, a signal simulation module, an upper computer and other components. Through the combination of a waveform generator in the waveform simulation module and multiple groups of filters, the system can generate high-quality square wave signals, and the phase is adjusted through a phase shifter to ensure that the phases of fundamental waves and harmonic waves are consistent, so that the precision of the signals is improved. In addition, the design of the adjustable attenuator allows the amplitude and power of the analog waveform to be flexibly adjusted, and the adaptability of the signal in different analog scenes is ensured.

The invention discloses a comb spectrum generator adopting a direct frequency synthesis mode. The comb spectrum generator comprises an amplifier, a harmonic generator circuit, a frequency division filter circuit, three power dividers and a frequency mixing filter circuit, a reference signal is amplified by an amplifier and then enters a harmonic generator circuit, four dot frequency signals with frequencies of 240MHz, 1560MHz, 1680MHz and 240MHz are generated by the harmonic generator circuit and then enter a frequency division filter circuit, the four dot frequency signals are subjected to frequency division and filter amplification in the frequency division filter circuit, and four dot frequency signals with pure frequency spectrums, stepping of 4MHz and frequencies of 48MHz, 52MHz, 56MHz and 60MHz are obtained. The comb spectrum signals are respectively sent to the three power dividers, are divided into three paths of power and are output to the frequency mixing filter circuit, the comb spectrum signals with the step of 1 MHz and the output frequency of 144-207 MHz are finally output after the comb spectrum signals pass through the frequency mixing filter circuit, and the number of frequency points is 64.

A high-voltage pulsing power supply system is disclosed that includes a DC power source, a switch circuit electrically coupled to the DC power source, a droop control circuit coupled to the switch circuit, and / or an output. The switch circuit includes a plurality of switch modules and generates a plurality of pulses. The droop control circuit includes a droop diode, a droop inductor, and a droop element. The droop diode may be electrically coupled in series between the switch circuit and a primary winding of a transformer and allows negative pulse portions of the plurality of pulses to pass from the switch circuit to the primary winding of the transformer. The droop inductor and droop element are disposed in series across the droop diode to allow negative pulse portions of the plurality of pulses to pass from the switch circuit to the primary winding of the transformer and / or store energy from the negative pulse portions of the plurality of pulses.

A first clock signal is generated from a reference clock signal. A first frequency associated with the first clock signal is less than a reference clock frequency associated with the reference clock signal. The first clock signal is propagated towards a first component of an integrated circuit through a clock tree. A second clock signal having a second frequency is generated from the first clock signal at a terminal point of the clock tree. The second clock signal is provided to the first component.

Method for generating a pulse (7, 9; 207, 209; 307, 309; 407, 409), wherein a predetermined first boundary curve (3) and a predetermined second boundary curve (5) are defined for a pulse shape of the pulse (7, 9; 207, 209; 307, 309; 407, 409), wherein the boundary curves (3, 5) describe the time course of a current quantity (I), and wherein the second boundary curve (5) lies completely within the first boundary curve (3), characterized in that a curve inscribed between the boundary curves (3, 5) is generated as the pulse shape for the pulse (7, 9; 207, 209; 307, 309; 407, 409) by means of a current sink (37), which – compared to a rectangular pulse inscribed between the boundary curves (3, 5) – is located in a first region of the current quantity that is away from an extremum. (I) is deformed towards the first limit curve (3), and in a second region of the current quantity (I) facing the extremum is deformed towards the second limit curve (5).

According to an embodiment of the present disclosure, a multi-phase clock generation circuit and a multi-phase clock calibration circuit are provided. The multi-phase clock generation circuit includes a multi-phase clock generation circuit; a multi-phase clock error detection circuit, including a first set of DC component extraction modules, a phase difference detection circuit, a second set of DC component extraction modules, a multiplexing module, and a comparison module, wherein the multi-phase clock signals are input to the comparison module via the first set of DC component extraction modules and the multiplexing module, and the multi-phase clock signals are input to the comparison module via the phase difference detection circuit, the second DC component extraction module, and the multiplexing module, and the comparison module outputs a detected error; a digital control circuit that assigns a selection module number to each sub-module in the multiplexing module; a multi-phase clock adjustment circuit that includes a duty cycle adjustment circuit and a phase adjustment circuit. The embodiments of the present disclosure can effectively reduce the calibration process of the chip, simplify the chip design, and reduce costs.

A switching assembly for transferring trains of pulses includes a first and second assembly terminal, a first and second set of relays, a first and second capacitor and a controller to concurrently activate the first and second set to connect the first and the second assembly terminals to transfer the trains of pulses. The relays of the first set and the first capacitor are connected in parallel. The relays of the second set connect and the second capacitor are connected in parallel.

The invention discloses a TTL (transistor-transistor logic) level nanosecond pulse pair generating circuit, which belongs to the field of optical fiber sensing systems and comprises a TTL level square wave generator, a first nanosecond pulse generator, a second nanosecond pulse generator, a time delay circuit, a pulse signal router and a frequency divider, the TTL level square wave generator is connected with the time delay circuit and the frequency divider; the frequency divider is connected with the pulse signal router; the time delay circuit is simultaneously connected with the first nanosecond pulse generator and the second nanosecond pulse generator; the first nanosecond pulse generator is connected with the pulse signal router; the second nanosecond pulse generator is connected with the pulse signal router; the pulse signal router outputs two groups of pulse signals. According to the invention, two relatively wide laser pulse pairs with a certain width difference can be used for respectively detecting, and then the detected signals of the two laser pulse pairs are compared, so that narrow pulse detection is realized under the condition of maintaining a relatively high signal-to-noise ratio of the photoelectric detector, and the photoelectric detector is simple, convenient and beneficial to popularization.

The present application discloses a demodulation circuit and a rotary digital converter, relating to the technical field of rotary digital converters. The demodulation circuit is composed of a peak detection circuit and a phase-locked loop. The peak detection circuit is used to extract the envelope waveform in the incoming resolver input signal and demodulate the envelope waveform to obtain rotor information. The phase-locked loop is used to identify the phase information of the accessed resolver input signal. After determining the offset error, a sampling clock and a synchronization clock are generated according to the offset error, and the sampling clock and the synchronization clock are transmitted to the peak detection circuit to correct the envelope waveform. The phase-locked loop assists the peak detection circuit to improve the gain of the envelope waveform extracted by the peak detection circuit, thereby improving the signal-to-noise ratio and further improving the demodulation effect and demodulation accuracy of the envelope waveform.

The invention relates to the technical field of analog integrated circuits, in particular to a high-precision temperature sensor temperature-sensing front-end circuit based on a chopping technology, and aims to solve the problems of low-frequency 1 / f noise, operational amplifier input offset voltage drift, band-gap reference temperature drift, limited output driving capability and the like existing at the front end of a traditional temperature sensor. The front-end circuit comprises a chopping band-gap reference source circuit, a chopping buffer circuit and a two-phase non-overlapping clock generation circuit, wherein the chopping band-gap reference source circuit adopts a parasitic bipolar PNP transistor with an emitter junction area ratio of 8: 1 as a temperature sensing device, and a high-gain chopping folded cascode operational amplifier is embedded in the chopping band-gap reference source circuit; and stable positive temperature coefficient voltage and low-temperature drift reference voltage are generated. Noise and maladjustment are inhibited from the system architecture level, the temperature measurement precision can reach the sub-degree centigrade level, the loading capacity is high, the method is achieved based on the standard CMOS technology, a special technology and complex temperature calibration are not needed, and the method has the advantages of being low in cost, high in stability and large-scale integration.

The present disclosure provides a signal transmission device. The signal transmission device includes a transmitting circuit, a plurality of insulated transmission paths and a receiving circuit. The transmitting circuit is configured to generate a plurality of mixed data strings from a plurality of input data strings. The plurality of insulated transmission paths are configured for insulation transmission of the plurality of mixed data strings. The receiving circuit is configured to restore a plurality of output data strings corresponding to the plurality of input data strings from the plurality of mixed data strings that are insulated and transmitted via the plurality of insulated transmission paths.

This application provides a radio frequency (RF) driving device and an RF power supply system. The RF driving device includes an input terminal, an output terminal, and N RF driving circuits connected between the input terminal and the output terminal. The input terminal and the output terminal are respectively connected to a DC power supply and an RF generator. Each RF driving circuit has a driving state and a stopped driving state. Each RF driving circuit is used to convert DC power into target power when in the driving state, and to stop receiving DC power from the DC power supply when in the stopped driving state. The driving output terminals of the N RF driving circuits are connected in sequence and connected to the output terminal through the driving output terminal of the last RF driving circuit to form an output path, so that the target power output by the RF driving circuit in the driving state is transmitted to the output terminal through the output path and then output to the RF generator. This application can protect the RF generator.

The invention discloses a high-speed data serialization circuit for high-speed and high-energy-efficiency wired interface application. The high-speed data serialization circuit comprises a plurality of edge enhanced unit interval pulse generation circuits and an all-in-one multiplexer circuit, each edge enhanced unit interval pulse generation circuit is used for generating a pulse signal with a unit interval width based on the states of an input data signal and a clock signal and a preset pre-charging and rapid discharging strategy; and each input end of the all-in-one multiplexer circuit is correspondingly connected with the output end of one edge enhanced unit interval pulse generation circuit, and is used for serializing all pulse signals through an active peaking technology and outputting the pulse signals to an output node. The high-speed data serialization circuit provided by the invention can expand the bandwidth of the output node so as to adapt to higher frequency requirements.