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Serial digital data communication interface

A serial communication and data technology, applied in the direction of digital transmission system, synchronous signal speed/phase control, electrical components, etc., can solve the problems of signaling delay difference and change

Active Publication Date: 2009-09-09
ANALOG DEVICES INC
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Variations and changes in signaling delays can be caused, for example, by inherent variations in fabrication processes, environmental conditions over time, power supply variations, and other factors

Method used

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  • Serial digital data communication interface
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Examples

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Embodiment Construction

[0038] Describes a serial communication interface and protocol for communication between a data sender and a data receiver, whereby data is sent in frames of a specified length, requiring synchronization only periodically. This approach tolerates variations in propagation delay and bit edge timing.

[0039] refer to figure 1 , data are sent from N data transmitters 12 to data receivers 14, where N is an integer. (While multiple transmitters and a single receiver are shown, the invention is of course applicable to a single transmitter-single receiver environment as well as a multiple transmitter-multiple receiver environment.) Each data transmitter may be such as Any of a number of devices that generate a digital data output, such as an analog-to-digital converter (ADC), current-to-digital converter (IDC), etc. Each data transmitter is numbered 12-i, where index i ranges from 1 to N. Communication takes place via a synchronization channel 16 , a clock channel 18 and N data c...

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Abstract

A serial protocol and interface for data transmission from a data transmitter 12 to a data receiver 14 where the propagation delay may be up to several clock cycles long and may be varying slowly. The data receiver provides a clock to the data transmitter. A synchronization signal provided by either the receiver or the transmitter initiates a frame of data transmission at a transfer rate controlled by the clock. The synchronization signal coordinates the transmission of a data header followed by a predetermined number of data bits, known as the frame length. The data receiver uses the header bits to determine the times to sample the subsequent data bits. The length of the frame is limited to provide sufficient likelihood the propagation delay line characteristics have not changed enough to cause a bit error. The system resynchronizes at the beginning of each frame.

Description

[0001] Cross References to Related Applications [0002] This application claims priority under 35 USC Section 119(e) to Provisional Application No. 60 / 846,177, filed September 21, 2006, entitled "Digital Data Communication For Data Converters," the contents of which are hereby incorporated by reference. technical field [0003] The present invention relates to the field of serial communication interfaces and to a method for providing high rate data transmission between sending and receiving devices in the presence of a propagation delay in the channel between them. Background technique [0004] In general, a data transmitter (ie, a device with a digital data output) is usually required to deliver digital data to other devices (ie, a data receiver) at a high rate and usually over a serial communication channel. The clock rate (speed) used for communication between devices is often sufficiently high that there are propagation delay problems. Unknown, variable, or excessive p...

Claims

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Application Information

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IPC IPC(8): H04L7/04H04L7/10H04L7/033
CPCH04L7/041H04L7/042H04L7/0337H04L7/046H04L7/10
Inventor 迈克尔·C·W·科尔恩阿兰·盖里
Owner ANALOG DEVICES INC
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