Method for packaging semiconductor with cavity

Abstract

The invention relates to a method for packaging a semiconductor with a cavity, which comprises the following steps of: a, providing a substrate of which the front side has a chip accommodating area; b, forming a barrier layer above the front side; c, coating a UV adhesive layer on the upper surface of the barrier layer; d, removing an area, corresponding to the chip accommodating area, in the UV adhesive layer; e, further removing an area, corresponding to the chip accommodating area, in the barrier layer; f, arranging a chip on the chip accommodating area in an open accommodating chamber and molding an wire on the chip to electrically connect the chip and the substrate; and g, arranging a cover layer on the UV adhesive layer and heating the UV adhesive layer to fix the cover layer on the barrier layer. The design of the invention can reduce glue overflow generated during the packaging of the semiconductor considerably; and the method can be implemented by the prior art without increasing equipment purchase cost.

Description

technical field [0001] The present invention relates to semiconductor packaging, in particular to an improved method for semiconductor packaging steps. Background technique [0002] Known packaging components with chambers, such as: micro-electromechanical chip packaging or CMOS chip packaging methods are mostly to first stick the chip on the chip placement area of ​​a substrate, and build a wall-shaped surrounding the chip placement area. Barrier layer (dam), the bottom surface of the barrier layer is bonded to the periphery of the substrate placement area to enclose the chip in the middle, then electrically connect the chip and the substrate, and finally coat the upper surface of the barrier layer with adhesive, and then seal the A cover, such as glass, etc., is pasted on the barrier layer to package the chip in a closed space. [0003] However, in these conventional micro-electromechanical chip packaging processes with chambers, since the adhesive is gel-like and has uns...

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Problems solved by technology

[0003] However, in these conventional micro-electromechanical chip packaging processes with chambers, since the adhesive is gel-like and has unstable physical properties, it is difficult to evenly coat the wall-like barrier layer, and then coat the adhesive on the barrier layer. And after the cover is put on, there are occasional cases where the glue overflows and contaminates the chip; moreover, when the cover is pasted on the barrier layer, it is easy to slip due to the uncured glue, which reduces its sealing effect , all these are the areas that still need to be improved

[0004] As mentioned above, the known semiconductor packaging method with a chamber does have defects in its design structure, which needs to be improved

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