Pipelined analog-digital converter
An analog-to-digital converter and pipeline technology, applied in the direction of analog-to-digital converters, can solve problems such as bit errors and affecting the dynamic range of ADCs, and achieve the effect of reducing power consumption and saving power consumption
Inactive Publication Date: 2009-10-07
苏州通创微芯有限公司
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Problems solved by technology
If the difference exceeds the correction range of the pipeline ADC, a bit error will occur, which will seriously affect the dynamic range of the ADC
Method used
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[0024] The preferred embodiment of the present invention will be described in detail below in conjunction with accompanying drawing:
[0025] Such as figure 1 The shown pipeline analog-to-digital converter includes eleven sub-pipeline stages 1, and the sub-pipeline stage 1 is used for analog-to-digital conversion and residual amplification of the analog signal input by the pipeline analog-to-digital converter, and each sub-pipeline The output digital code of stage 1 is input to delay synchronization register 2. The analog signal output by each sub-pipeline stage 1 enters the next stage to repeat the above process.
[0026] Delay synchronous register 2, which is used to delay align the output digital codes of each sub-pipeline level 1, and input the aligned digital codes to digital correction module 3;
[0027] A digital correction module 3, which is used to receive the output digital code of the delay synchronization register 2, and shift and add the received digital code to...
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The present invention relates to a pipelined analog-digital converter, including a plurality of sub pipelined stages for implementing analog-to-digital conversion and allowance amplification to input analog signals; a time-delay synchronization register for implementing time-delay alignment to output digital codes from each pipelined stage; a digital correction module for receiving output digital codes from the synchronization register, and implementing bit shift addition to the output digital codes to obtain digital output codes of the analog-digital converter; a dynamic bias circuit for adjusting the bias level of the operational amplifier of each sub pipelined stage according to the frequency of sampling clocks to each sub pipelines stage; and a built-in band-gap reference source circuit for generating a reference voltage source of the dynamic bias circuit, thus the ''excess'' of the operational amplifier quantity for meeting the built-up time of a highest sampling frequency may be avoided, and an amplifying power will be reduced accordingly relative to a lower sampling frequency, thereby the power consumption of the analog-digital converter will be saved integrally.
Description
technical field [0001] The invention relates to a pipeline analog-digital converter, in particular to a pipeline analog-digital converter which eliminates the use of a holding circuit. Background technique [0002] With the increasing development of semiconductor technology, digital multimedia electronic products play a decisive role in people's life. Digital technology has the characteristics of strong anti-interference ability and stability, simple circuit structure, convenient design, high integration, flexibility and portability. Most of the analog quantities encountered in practice are continuously changing analog quantities, which need to be converted into digital signals through analog / digital conversion before they can be input into the digital system for processing and control. Therefore, as an interface circuit for converting analog power into digital output- The analog-to-digital converter is the bridge from analog signal to digital signal in the real world, and ...
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Inventor 刘大伟
Owner 苏州通创微芯有限公司