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Method for forming N-type lightly doped region and method for manufacturing semiconductor device

A manufacturing method and light doping technology, which can be used in semiconductor/solid-state device manufacturing, electrical components, circuits, etc., and can solve problems such as the decline in resistance to breakdown

Active Publication Date: 2009-11-04
SEMICONDUCTOR MANUFACTURING INTERNATIONAL (BEIJING) CORP
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  • Application Information

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Problems solved by technology

[0009] The MOS device formed by the source electrode and the drain electrode formed by the two-time ion implantation method, although the PN junction leakage current has a certain reduction, makes the short channel effect (short channel effect) of the formed MOS device relatively serious, and the resistance to Decreased ability to wear (anti-punchthrough)

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  • Method for forming N-type lightly doped region and method for manufacturing semiconductor device
  • Method for forming N-type lightly doped region and method for manufacturing semiconductor device
  • Method for forming N-type lightly doped region and method for manufacturing semiconductor device

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Embodiment Construction

[0080] The specific embodiments of the present invention will be described in detail below in conjunction with the accompanying drawings.

[0081] The invention provides a method for forming an N-type lightly doped region. figure 2 It is a flowchart of an embodiment of the method for forming an N-type lightly doped region of the present invention.

[0082] Please refer to figure 2 , step S100, providing a semiconductor substrate with a gate.

[0083] Step S110, performing a first N-type light doping process on the semiconductor substrate with a first energy and a first dose.

[0084] Step S120, performing a second N-type light doping process on the semiconductor substrate with a second energy and a second dose; wherein, the energy value of the second energy is greater than the energy value of the first energy, and the energy value of the second dose is The dose value is less than that of the first dose.

[0085] Step S130 , performing an annealing process on the semicond...

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Abstract

The invention relates to a method for forming an N-type lightly doped region, which comprises the following steps: providing a semiconductor substrate provided with a grid electrode; performing primary N-type light doping process on the semiconductor substrate through first energy and first dosage; performing a secondary N-type light doping process on the semiconductor substrate through second energy and second dosage; and performing an annealing process on the semiconductor substrate after the completion of all the N-type light doping processes, wherein the energy value of the second energy is more than that of the first energy, and the dosage value of the second dosage is less than that of the first dosage. The invention also provides a method for manufacturing a semiconductor device. The invention can improve the short-channel effect of formed MOS devices and the puncture resistance.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a method for forming an N-type lightly doped region and a method for manufacturing a semiconductor device. Background technique [0002] Metal Oxide Semiconductor (MOS) devices are widely used due to their low power consumption, fast response and other characteristics. A typical MOS device includes a gate, source and drain. A lightly doped region (LDD region) is also formed in the region of the source and drain close to the bottom of the gate. [0003] With the increasing progress of semiconductor integrated circuit manufacturing technology, the gate size is getting smaller and smaller, and the conductive channel is getting shorter and shorter. The PN junction leakage current of the formed MOS device has more and more obvious influence on the performance of the device. [0004] In order to improve the performance of MOS devices and reduce the influence of le...

Claims

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Application Information

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IPC IPC(8): H01L21/336H01L21/8238
Inventor 居建华
Owner SEMICONDUCTOR MANUFACTURING INTERNATIONAL (BEIJING) CORP