Looking for breakthrough ideas for innovation challenges? Try Patsnap Eureka!

Chip lug structure and manufacturing method thereof

A manufacturing method and a technology of bumps, which are applied in semiconductor/solid-state device manufacturing, electrical components, electric solid-state devices, etc., can solve the problems affecting the reliability of packaging, difficult to control the amount of solder in solder bumps 18, and the amount of solder does not meet the requirements, etc.

Inactive Publication Date: 2010-01-06
SEMICON MFG INT (SHANGHAI) CORP
View PDF0 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Generally, different products have different requirements for the solder dose of the solder bump 18; however, in actual operation, the solder dose of the solder bump 18 is difficult to control
Because when the solder is reflowed to melt into a spherical shape, too much solder will flow down from the edge of the copper pillar 16, which will cause the amount of solder to not meet the requirements and affect the reliability of the package.

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Chip lug structure and manufacturing method thereof
  • Chip lug structure and manufacturing method thereof
  • Chip lug structure and manufacturing method thereof

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0021] The present invention will be further described below in conjunction with the accompanying drawings and embodiments.

[0022] Please refer to figure 2 , which is a schematic cross-sectional view of a chip bump structure provided by an embodiment of the present invention. As shown in the figure, the chip bump structure is formed on the bonding pad 22 on the surface of the wafer 20, which includes a connecting body 26 on the bonding pad and a solder bump 28 on the connecting body 26, wherein the connecting body 26 has a shape For the Taiwan body. Usually, a first included angle α is formed between the side of the connecting body 26 and the surface of the wafer 20; A second included angle β less than 90 degrees is formed between the surfaces, wherein the first included angle α is smaller than the second included angle β.

[0023] In actual operation, the material of the connecting body 26 is often copper; and the UBM layer 24 is usually formed between it and the pad 22...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention provides a chip lug structure and a manufacturing method thereof. A connector for the chip lug is designed into a table shape, and the inclination angle of the side of the connector is set according to the dosage of a solder for soldering the lug so as to meet the customization requirements of clients; and compared with the prior columnar connector, under the same section diameter, the connector of the invention can support the solder of more dosage and avoid the problem that the solder flows down from the edge of a copper column in a refluxing process. The chip lug structure is positioned on a solder pad on the surface of a wafer, and comprises the connector positioned on the solder pad and a solder lug positioned on the connector, wherein the connector has the table shape.

Description

technical field [0001] The invention relates to a semiconductor packaging structure and a manufacturing method thereof, in particular to a chip bump structure and a manufacturing method thereof. Background technique [0002] With the rapid development of semiconductor process technology, the function of semiconductor chips is becoming more and more powerful, and the number of pins is also increasing. In order to meet the needs of the market, chip packaging technology has been routed to low-level dual in-line packaging (DIP) technology, etc. Gradually developed to advanced packaging technologies such as chip scale packaging (CSP). [0003] Among them, chip-level packaging is directly connected to the circuit board with bumps or ball mounts. Since no interposer, underfill and lead frame are required, and die bonding and wire bonding are omitted. The manufacturing process has greatly reduced the cost of materials and labor, thus achieving rapid development. In the development...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Applications(China)
IPC IPC(8): H01L23/485H01L21/60
CPCH01L24/11H01L2224/11H01L2924/00012
Inventor 李德君
Owner SEMICON MFG INT (SHANGHAI) CORP
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Patsnap Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Patsnap Eureka Blog
Learn More
PatSnap group products