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Photoelectric conversion circuit and solid-state imaging device provided with the same

A technology for converting circuits and optoelectronics, which is applied to electric solid devices, circuits, radiation control devices, etc., can solve the problems of inability to use the avalanche multiplication effect, inability to stabilize, and apply bias voltage, and achieve the effect of light receiving sensitivity.

Inactive Publication Date: 2010-03-31
ROHM CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0015] But when Figure 8 In the conventional CMOS sensor shown, since the cathode potential of the photodiode 71 fluctuates depending on the amount of charge stored in the capacitor 72, the bias voltage fluctuates with respect to the photodiode 71, and an arbitrary bias voltage cannot be stably applied. The avalanche multiplier effect

Method used

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  • Photoelectric conversion circuit and solid-state imaging device provided with the same
  • Photoelectric conversion circuit and solid-state imaging device provided with the same
  • Photoelectric conversion circuit and solid-state imaging device provided with the same

Examples

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no. 1 approach

[0043] figure 1 It is a block diagram showing the general configuration of the solid-state imaging device according to the first embodiment of the present invention.

[0044] like figure 1 As shown, the solid-state imaging device 101 includes a sensor array 1 , a row decoder 2 and a column decoder 3 .

[0045] The sensor array 1 has a two-dimensional matrix structure, that is, the row selection lines X1 to Xm and the column selection lines Y1 to Yn are distributed in the horizontal direction and the vertical direction, respectively, and pixel sensors are arranged at each place where the two signal lines intersect, with a total of m× n (wherein, m and n are both integers of 2 or more) pixel sensors P11 to Pmn. Again, in figure 1 Although not explicitly shown in the figure, in addition to the row selection lines X1 to Xm and column selection lines Y1 to Yn, power supply voltage lines and ground voltage lines, various clock lines and bias voltages are also connected to the ...

no. 2 approach

[0081] Figure 5 It is a circuit diagram showing the structure of the pixel sensor Pmn according to the second embodiment of the present invention.

[0082] like Figure 5 As shown, in the pixel sensor Pmn of the present embodiment, the current mirror circuit 12 that generates the mirror current Im according to the photocurrent Id includes, in addition to the first mirror stage (transistors N2, N4), the dotted line in the figure. The surrounding second mirror stage (transistors N9, N10) generates a mirror current Im for discharging the MOS capacitor by combining the currents Im1, Im2 generated in the respective mirror stages.

[0083] Therefore, by increasing the number of mirror stages of the current mirror circuit, it is possible to amplify the photocurrent Id, thereby improving the light-receiving sensitivity and improving the light-receiving signal S / N ratio.

no. 3 approach

[0085] Image 6 It is a circuit diagram showing the structure of the pixel sensor Pmn (common anode) according to the third embodiment of the present invention.

[0086] like Image 6 As shown, the pixel sensor Pmn of this embodiment includes a photodetector PD, a current mirror circuit 13, and P-channel field effect transistors P5 to P8. The current mirror circuit 13 includes P-channel field effect transistors P1 to P4.

[0087] A bias voltage VDDPD (a negative voltage of several tens to several hundreds [V]) is applied to the anode of the photodetector PD, and a photocurrent Id corresponding to the amount of received light is output from the cathode.

[0088] The current mirror circuit 13 has an input terminal connected to the cathode of the photodetector PD so that the cathode voltage Vc of the photodetector PD is clamped to a predetermined potential (VDD-2×Vht), and generates a reflection corresponding to the photocurrent Id mirror current Im.

[0089] One end of the M...

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Abstract

Photoelectric conversion circuits (P11-Pmn) are provided with a photoelectric conversion element (PD) which has a bias voltage applied at one end and outputs a photocurrent from the other end corresponding to a receiving light quantity, and photocurrent detecting sections (11-13) which clamp the other end voltage of the photoelectric conversion element (PD) at prescribed potential and detect the photocurrent.

Description

technical field [0001] The present invention relates to a photoelectric conversion circuit and a solid-state imaging device including the same. Background technique [0002] Figure 8 It is a circuit diagram showing a conventional example of a CMOS (Complementary Metal Oxide Semiconductor) type photoelectric conversion circuit (so-called CMOS sensor). [0003] exist Figure 8 In the CMOS sensor shown, the anode of the photodiode 71 is connected to ground. The cathode of the photodiode 71 is connected to one end of the switch 74 . The other end of the switch 74 is connected to one end of the capacitor 72 , the gate of the N-channel field effect transistor 73 , and one end of the switch 75 . The other end of the capacitor 72 is connected to the ground. The other end of the switch 75 is connected to the application end of the power supply voltage VDD. The drain of the transistor 73 is connected to the application terminal of the power supply voltage VDD. The source of the ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H04N5/335H01L27/146H01L31/10H04N25/00
CPCH01L27/14609H04N5/374H01L27/14643H04N5/3559H04N5/335H04N25/00H04N25/59H04N25/76H04N25/77H04N25/773
Inventor 关口大志渊上贵昭
Owner ROHM CO LTD
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