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Non-volatile memory and method for predictive programming

A non-volatile, memory technology, used in static memory, read-only memory, digital memory information, etc., can solve problems such as unsolved memory

Active Publication Date: 2013-06-26
SANDISK TECH LLC
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

This type of scaling is on a coarse scale at the page level and does not address the shortcomings of conventional cell-by-cell based programming and verifying of memory in the field

Method used

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  • Non-volatile memory and method for predictive programming
  • Non-volatile memory and method for predictive programming
  • Non-volatile memory and method for predictive programming

Examples

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Embodiment Construction

[0040] memory system

[0041] figure 1 Figure 5 illustrates an example memory system in which various aspects of the invention may be implemented.

[0042] Figure 6 Traditional programming techniques are illustrated.

[0043] Figure 7 to Figure 16 Various aspects and embodiments of the invention are illustrated.

[0044] figure 1 Functional blocks of a nonvolatile memory chip that can implement the present invention are schematically illustrated. The memory chip 100 includes a two-dimensional array 200 of memory cells, a control circuit 210 and peripheral circuits such as decoders, read / write circuits and multiplexers.

[0045] Memory array 200 is addressable by word lines via row decoder 230 (split into 230A, 230B) and by bit lines via column decoder 260 (split into 260A, 260B) (see also Figure 4 and Figure 5). Read / write circuitry 270 (split into 270A, 270B) allows a page of memory cells to be read or programmed in parallel. Data I / O bus 231 is coupled to read / ...

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PUM

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Abstract

In a nonvolatile memory having an array of memory cells, wherein the memory cells are individually programmable to one of a range of threshold voltage levels, there is provided a predictive programming mode in which a predetermined function predicts what programming voltage level needs to be applied in order to program a given memory cell to a given target threshold voltage level. In this way, no verify operation needs to be performed, thereby greatly improving the performance of the programming operation. In a preferred embodiment, the predetermined function is linear and is calibrated for each memory cell under programming by one or more checkpoints. The checkpoint is an actual programming voltage that programs the memory cell in question to a verified designated threshold voltage level.

Description

technical field [0001] The present invention relates generally to non-volatile semiconductor memories such as Electrically Erasable Programmable Read Only Memory (EEPROM) and flash EEPROM, and more particularly to memory and programming operations in which the number of program verify operations is minimized. Background technique [0002] Solid-state memory capable of storing electrical charge non-volatilely, particularly in the form of EEPROM and flash EEPROM packaged as small form factor cards, has recently become a popular choice for various mobile and handheld devices, novel information appliances, and consumer memory of choice in electronics. Unlike RAM (Random Access Memory), which is also solid-state memory, flash memory is non-volatile and retains its stored data even after power is removed. Despite the higher cost, flash memory is increasingly used in mass storage applications. Traditional mass storage based on rotating magnetic media such as hard drives and flopp...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G11C16/10G11C11/56
CPCG11C16/3454G11C11/5628G11C16/0483G11C16/10G11C2211/5621G11C11/56G11C16/12
Inventor 劳尔-阿德里安·塞尔尼亚
Owner SANDISK TECH LLC
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