Fan-out circuit of array substrate

A technology of array substrates and fan-out circuits, applied in circuits, nonlinear optics, optics, etc., can solve problems such as disconnection of wires 130, achieve the effects of preventing disconnection, improving yield and display effect, and avoiding scratches

Active Publication Date: 2010-06-02
CENTURY DISPLAY (SHENZHEN) CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

In the case of severe scratches, the wire

Method used

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  • Fan-out circuit of array substrate
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  • Fan-out circuit of array substrate

Examples

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Example

[0033] First embodiment

[0034] Figure 3A It is a schematic diagram of the fan-out circuit of the first embodiment of the present invention. Please refer to Figure 3A In this embodiment, the fan-out circuit 300 may be a circuit layout implementation manner provided on the aforementioned array substrate 200. The fan-out circuit 300 is composed of a main fan-out wire 320 and a pseudo-fan-out wire pattern 340 disposed on the substrate 30. And the main fan-out wire 320 and the pseudo-fan-out wire pattern 340 are arranged in a staggered manner, wherein the pseudo-fan-out wire pattern 340 includes a pseudo-fan-out wire 330 and a pad layer 310 (refer to Figure 3B ). In addition, according to the requirements of circuit layout or impedance matching, the pseudo-fan-out wire 330 may be electrically connected to the main fan-out wire 320, or may be a floating line (Floating Line).

[0035] Figure 3B for Figure 3A Section along the line B-B' in the middle. Please refer to Figure 3B A...

Example

[0038] Second embodiment

[0039] Figure 4A It is a schematic diagram of the fan-out circuit of the second embodiment of the present invention. Please refer to Figure 4A In this embodiment, the fan-out circuit 400 may be a circuit layout implementation manner provided on the aforementioned array substrate 200. The fan-out circuit 400 is composed of a main fan-out wire 420 and a pseudo-fan-out wire pattern 440 disposed on the substrate 40. And the main fan-out wire 420 and the pseudo-fan-out wire pattern 440 are alternately arranged, wherein the pseudo-fan-out wire pattern 440 includes the pseudo-fan-out wire 430 and the pad layer 410 (refer to Figure 4B ). In addition, according to the requirements of circuit layout or impedance matching, the pseudo-fan-out wire 430 may be electrically connected to the main fan-out wire 420, or may be a floating line (Floating Line).

[0040] Figure 4B for Figure 4A Section along the line C-C' in the middle. Please refer to Figure 4B From ...

Example

[0042] The third embodiment

[0043] Figure 5A It is a schematic diagram of the fan-out circuit of the third embodiment of the present invention. Please refer to Figure 5A In this embodiment, the fan-out circuit 500 may be a circuit layout implementation manner provided on the aforementioned array substrate 200. The fan-out circuit 500 is composed of a main fan-out wire 520 and a pseudo-fan-out wire pattern 540 disposed on the substrate 50. And the main fan-out wire 520 and the pseudo-fan-out wire pattern 540 are arranged in a staggered manner, wherein the pseudo-fan-out wire pattern 540 includes a pseudo-fan-out wire 530 and a pad layer 510 (refer to Figure 5B ). In addition, according to the requirements of circuit layout or impedance matching, the pseudo-fan-out wire 530 may be electrically connected to the fan-out wire 520, or may be a floating line (Floating Line).

[0044] Figure 5B for Figure 5A Section along the line D-D' in the middle. Please refer to Figure 5B Fr...

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Abstract

The invention provides a fan-out circuit of an array substrate. The array substrate comprises a substrate and also comprises a first metal layer, a first insulating layer, a semiconductor layer, a second metal layer and a second insulating layer which are sequentially superposed on the substrate. The fan-out circuit comprises at least one fan-out lead and at least one block up layer, wherein the fan-out lead consists of at least one of the fist metal layer and the second metal layer; the block up layers are piled on the fan-out leads; the first insulating layer is arranged between the block up layers and the fan-out leads; and the second insulating layer is arranged on the block up layers.

Description

【Technical Field】 [0001] The invention relates to a fan-out circuit, and in particular to a fan-out circuit of a liquid crystal display panel. 【Background technique】 [0002] In the existing panel layout design, the fan-out area on the terminal side of the display panel or the array substrate of the touch panel mostly uses a single layer circuit structure. Therefore, the circuit structure is prone to scratches on the surface during the manufacturing process. For the array substrate of the display panel, when the circuit structure is slightly scratched, although it is not easy to find abnormalities in the initial lighting screen, it will accelerate its failure during the RA verification. In addition, when the circuit structure is severely scratched, it will cause wire breakage, thereby reducing the display effect of the panel. [0003] In view of the occurrence of the above phenomenon, the designer can take some anti-scratch measures when designing to avoid display abnormalities c...

Claims

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Application Information

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IPC IPC(8): G02F1/1345H01L23/528
Inventor 党娟宁李蒙钟明达
Owner CENTURY DISPLAY (SHENZHEN) CO LTD
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