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Camera-Link digital video information superimposing method

A technology of digital video and overlay method, which is applied in the field of image processing, can solve problems such as inability to strictly align video and data, achieve the effect of reducing connection lines and ensuring strict alignment

Inactive Publication Date: 2010-06-09
CHANGCHUN INST OF OPTICS FINE MECHANICS & PHYSICS CHINESE ACAD OF SCI
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  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The disadvantage of this method is that the receiving end cannot strictly align the received video and data, and generally there will be an error of more than one frame or several frame image periods, which is not allowed in many cases

Method used

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Embodiment Construction

[0017] The present invention is described in further detail below in conjunction with accompanying drawing:

[0018] like figure 1 Shown, the Camera-Link digital video information overlay method of the present invention comprises the steps:

[0019] Step 1, carry out video decoding to the digital video of the input Camera-Link interface, be about to send video signal directly to decoding chip DS90CR286 or DS90CR288, then can directly obtain parallel n bit image data signal Pix Data (image The number of data bits n is determined by the camera model, usually n=8 or 10) and three control signals (frame synchronization FVAL, line synchronization LVAL, pixel clock Pixclk), the specific timing relationship is as follows figure 2 shown. The decoded image data signal and three control signals are sent to the FPGA chip, and the superimposition of digital video information can be realized through FPGA programming.

[0020] exist figure 2 Among them, the high level period of FVAL a...

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PUM

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Abstract

The invention relates to a Camera-Link digital video information superimposing method belonging to the technical field of image processing. The method comprises the following steps of: (1) decoding serial Camera-Link digital video signals into parallel image data signals and three control signals through a decoding chip, and transmitting the decoded image data signals and the decoded control signals into an FPGA; (2) generating a line counter and a column counter of a digital image by using the FPGA, wherein the two counters can be used for modifying the pixel values in the image; (3) superimposing the reference data information to be superimposed to the assigned position in the image according to the reference data decoding protocol; and (4) transmitting the superimposed image data and the three control signals to a video coding chip to regenerate the Camera-Link digital video. The invention not only saves a channel for transmitting the reference data but also can ensure the strict alignment of the image and the reference data.

Description

technical field [0001] The invention belongs to the technical field of image processing, and relates to a digital image and image parameter synchronous transmission technology, specifically, using a digital image transmission channel (such as a Camera-Link interface) to transmit each frame of image synchronously with the image related data. Background technique [0002] At present, with the advent of digital products and a large number of applications, the transmission and display of digital images has also received more and more attention. Especially in high-tech fields such as military industry and aerospace, how to transmit digital images and related data quickly and stably has always been an important issue. In many cases, what needs to be transmitted between two devices is not only digital video, but also a large amount of reference data synchronized with the video, such as image frame code, time and other information. Each set of data needs to be strictly correspondin...

Claims

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Application Information

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IPC IPC(8): H04N7/08H04N7/084
Inventor 郝志成吴川
Owner CHANGCHUN INST OF OPTICS FINE MECHANICS & PHYSICS CHINESE ACAD OF SCI
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