Stacked multi-encapsulation structure device, semiconductor encapsulation structure and manufacturing method thereof
A manufacturing method and semiconductor technology, applied in the direction of semiconductor/solid-state device manufacturing, semiconductor devices, semiconductor/solid-state device components, etc., can solve the problem of not having an intermediate substrate or a substrate, etc.
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[0046] refer to figure 2 , which shows a stacked multi-package device (Package On Package; POP) 200 according to an embodiment of the present invention. The stacked multi-package structure device 200 includes a lower package structure 210 and an upper package structure 220 .
[0047] The lower packaging structure 210 includes a first chip 214 fixed and electrically connected to an upper surface 242 of a first substrate 212 . The first substrate 212 has an upper metal layer and a lower metal layer, which can be patterned to provide appropriate circuitry, and are electrically connected to each other through plated through holes. An interposer 230 is disposed on the first chip 214 and electrically connected to the upper surface 242 of the first substrate 212 . The intermediary substrate 230 can be a circuit board or a substrate, and the substrate can be a plastic substrate or a silicon substrate. The intermediary substrate 230 has an upper surface 236 and a lower surface 238 ,...
PUM
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