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I2C bus signal acquisition device

A collection device and bus signal technology, applied in hardware monitoring, instrumentation, electrical digital data processing, etc., can solve the problems of high price, complex structure and operation, etc., and achieve the effect of low cost, easy implementation, and simple circuit structure

Inactive Publication Date: 2012-08-29
JIANGSU ZHONGKE HI WITS TECH DEV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, the structure and operation of the I2C bus signal acquisition analyzers that can be seen on the market are relatively complicated and expensive.

Method used

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  • I2C bus signal acquisition device
  • I2C bus signal acquisition device
  • I2C bus signal acquisition device

Examples

Experimental program
Comparison scheme
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Embodiment Construction

[0016] Please refer to figure 1 and figure 2 A preferred embodiment of the I2C bus signal acquisition device of the present invention includes a housing 10, a signal acquisition connector 20 disposed on the housing 10, a communication interface such as a USB interface disposed on the housing 10 30 and a signal acquisition circuit 40 disposed inside the housing 10 and connected to the signal acquisition connector 20 and the USB interface 30 . The signal acquisition connector 20 is used to connect the connector of the I2C bus to be collected on the main board, and it includes two pins SCL and SDA, which are respectively used to connect the clock signal line and the data signal line on the I2C bus to receive its on the data signal.

[0017] In other embodiments, the housing 10 can also be a circuit board or other carriers that can be provided with circuits, and the signal collection connector 20 can also be other structures that can collect data signals, such as probe structur...

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PUM

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Abstract

The invention relates to an I2C bus signal acquisition device comprising a first buffer, a second buffer, a first storage, a second storage, a trigger circuit, an accumulator and a microcontroller, wherein the first buffer receives data signals of an I2C bus; the trigger circuit receives the data signals of the I2C bus and outputs a trigger signal when the data signals are positioned on a rising edge or a falling edge; the second buffer receives the trigger signal and buffers and locks the trigger signal; the accumulator controls data address bits +1 of the first storage and the second storage through the trigger signal so that the first storage and the second storage sequentially store data signals of clock signal lines and data signal lines of the I2C bus; and the microcontroller receives a control command sent by a computer mainframe to control the data signals of the I2C bus, which are acquired and stored by the first storage and the second storage, and output stored data to the computer mainframe. The I2C bus signal acquisition device circuit can conveniently realize the acquisition of the data signals of the I2C bus.

Description

technical field [0001] The invention relates to a signal acquisition device, in particular to a signal acquisition device for collecting signals on an I2C (Inter-Integrated Circuit) bus. Background technique [0002] The I2C bus is a two-wire serial bus (including clock signal lines and data signal lines) developed by PHILIPS for connecting microcontrollers and their peripherals. The I2C bus originated in the 80s, originally developed for audio and video equipment, and today is mainly used in server management, including the communication of the status of individual components. For example, administrators can query various components to manage system configuration or grasp the functional status of components, such as power supplies and system fans. It can monitor memory, hard disk, network, system temperature and other parameters at any time, which increases the security of the system and facilitates management. Therefore, it is of great significance to collect and analyze...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F13/38G06F11/34
Inventor 李圣义
Owner JIANGSU ZHONGKE HI WITS TECH DEV