Nonvolatile storage gate and its operating method, and logic circuit incorporating nonvolatile storage gate and its operating method

Abstract

Provided is a logic circuit incorporating a nonvolatile storage gate which can hold data even after turning off the power supply, wherein the power supply can be turned off simultaneously upon entering a standby mode. A logic circuit (10) incorporating a nonvolatile storage gate comprises a logical operation section (14) having a logic gate (16), and a nonvolatile storage gate (12) having a nonvolatile storage section (18), a data interface control section (22) disposed contiguously to the nonvolatile storage section (18) and adapted for receiving a nonvolatile storage control signal (NVCTL) for writing data in the nonvolatile storage section (18) and reading data therefrom, and a volatile storage section (24) disposed contiguously to the nonvolatile storage section (18), and adapted for receiving a data input signal (D) and a clock signal (CLK) and outputting a data output signal (Q).

Description

technical field [0001] The present invention relates to a non-volatile memory gate and its operation method, and a non-volatile memory gate built-in logic circuit and its operation method, in particular to a non-volatile memory gate using a non-volatile memory element and its operation Method, nonvolatile storage gate built-in logic circuit and its operating method. Background technique [0002] In a large scale integrated circuit (LSI: Large Scale Integration) such as a central processing unit (CPU: Central Processing Unit), power is normally consumed due to leakage current even when the LSI is not operating. It is particularly remarkable in recent microprocessors. In 90nm processors, it accounts for 30% of the total power consumption. [0003] What is effective in reducing the leakage current is the method of turning off the power supply in the state (standby state) where the LSI is not performing arithmetic processing. However, when the power is cut off, the processed d...

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Problems solved by technology

[0005] In addition, when the power supply of the logic operation unit is turned on, the power supply of the memory gate is likely to be unstable, and it is necessary to deal with data garbled codes (data け) Countermeasures

In the case of saving all the data in the memory gate to the outside before turning off the power, cutting off the power supply of the memory element does not require the above measures, but there is a problem that it takes time to save the data when the amount of data to be saved is large.

In addition, when the power supply of the logic operation unit is turned on, the power supply to the memory gate is likely to be unstable, and countermeasures against data garbled characters are also required.

[0009] If all the data in the memory gate is saved before the power is turned off, the memory element is also powered off, so the above-mentioned countermeasure is unnecessary, but there is a problem that it takes time to save the data when the amount of data to be saved is large.

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