P-type silicon-on-insulator transverse device for improving current density and preparation process thereof

Abstract

The invention relates to a P-type silicon-on-insulator (SOI) transverse device for improving current density, which comprises an N-type semiconductor substrate, wherein a buried oxygen layer is arranged on the semiconductor substrate, an N epitaxial layer is arranged on the buried oxygen layer, an N type drift region and an N well region are arranged on the N epitaxial layer, a P type source region and an N contact region are arranged on the surface of the N well region, a P type buffer region and a N type drain region are arranged on the P type drift region, a gate oxide layer is also arranged on the surface of the N epitaxial layer, a P type source region and an N type contact region are arranged on the surface of an N well, and a field oxide layer is arranged in a region beyond the N type drain region on the surface of the P type drift region. The P-type silicon-on-insulator transverse device is characterized in that the P type buffer region of the P-type silicon-on-insulator transverse device is an annular buffer region which diffuses inwards to form a P type buffer diffusion region. A method for preparing the P-type silicon-on-insulator transverse device comprises the following specific steps of: growing the N type epitaxial layer on SOI; preparing the N well and the P type drift region; preparing the annular P type buffer region; preparing filed oxygen and gate oxygen; preparing a polycrystal gate; preparing the source region and the drain region; preparing a through hole; and preparing a metal layer.

Description

Technical field: [0001] The invention relates to the field of power semiconductor devices, and more specifically relates to a P-type silicon-on-insulator lateral device with increased current density and a preparation process thereof, which is suitable for high-voltage and high-current applications. Background technique: [0002] With the increasing demand for modern life, the performance of power integrated circuits has attracted more and more attention. Among them, the ability of power integrated circuits to handle high voltage and high current has become one of the most important performance indicators. The factors that determine the ability of power integrated circuits to handle high voltage and high current are not only the circuit structure and design of the power integrated circuit itself, but also the manufacturing process adopted by the circuit. The current capability that a single device with the same area can pass is a measure of the performance and The key to cos...

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Problems solved by technology

This has also become a difficult problem in the design of power devices

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