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Method and microprocessor for supporting single instruction stream and multi-instruction stream dynamic switching execution

A technology of single instruction stream and multiple instruction streams, which is applied in the direction of concurrent instruction execution and machine execution devices, can solve the problems of affecting processor performance, waste of processor resources, and insufficient utilization of scalar unit computing resources, etc., to achieve improved The effect of resource utilization, improving utilization, and reducing instruction bandwidth requirements

Active Publication Date: 2012-08-22
NAT UNIV OF DEFENSE TECH
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

However, such an execution method is relatively independent for the execution of a large number of applications in the application program (only a small amount of loop control and scalar processing are required), and the execution of the loop body with a long execution time often manifests as the time-consuming execution of the vector unit. When the loop body is processed, the scalar unit only performs a small amount of loop control and scalar processing, and most of the rest of the time is in an idle state, so the computing resources of the scalar unit are not fully utilized, which affects the improvement of the overall performance of the processor, resulting in waste of processor resources

Method used

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  • Method and microprocessor for supporting single instruction stream and multi-instruction stream dynamic switching execution
  • Method and microprocessor for supporting single instruction stream and multi-instruction stream dynamic switching execution
  • Method and microprocessor for supporting single instruction stream and multi-instruction stream dynamic switching execution

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Embodiment Construction

[0026] Such as figure 1 As shown, the method for supporting dynamic switching between single instruction streams and multiple instruction streams in the embodiment of the present invention uses scalar unit 2 and vector unit 3 to execute instructions from instruction issuing unit 1. The implementation steps are as follows: first, scalar unit 2 and vector unit 3 In the default single instruction flow mode, execute the same instruction stream from the instruction issuing unit 1. When the vector unit 3 executes the target loop body, the scalar unit 2 completes the initialization of the target loop body, and controls the target loop body instructions to cache and switch In the multi-instruction flow mode, then the vector unit 3 executes the cached target loop body instructions, while the scalar unit 2 executes the scalar instruction flow that is not associated with the target loop body, and finally switches to a single instruction when the vector unit 3 finishes executing the target ...

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Abstract

The invention discloses a method and a microprocessor for supporting single instruction stream and multi-instruction stream dynamic switching execution. In the method, a scalar unit and a vector unit are adopted for executing instructions from an instruction transmitting component, and the method comprises the following steps that: after a target loop body instruction is written into an instruction cache, the single instruction stream mode is switched to a multi-instruction stream mode; the vector unit executes the cached target loop body instruction, and simultaneously the scalar unit executes a scalar instruction stream uncorrelated to the target loop body; and when the vector unit finishes executing the target loop body, the multi-instruction stream mode is switched to a single instruction stream mode. The microprocessor comprises an instruction transmitting component, a scalar unit and a vector unit, wherein the instruction transmitting component is connected with the vector unit through an instruction stream switching unit; and the scalar unit executes a target loop body-uncorrelated scalar instruction from the instruction stream switching unit in the multi-instruction streammode. The invention has the advantages of high utilization rate of processor resources, high parallel processing performance, low hardware complexity, high integration level and support of an embedded operating system.

Description

technical field [0001] The invention relates to the field of microprocessors, in particular to a data processing method and a microprocessor with a scalar unit and a vector unit. Background technique [0002] The design of modern microprocessors usually takes into account the needs of wireless communication, image and video processing and other applications. These applications generally include multiple core algorithm modules connected in series (such as FFT, channel estimation, motion estimation and other algorithms). Among these core algorithm modules, vector processing and scalar processing present a variety of cooperative execution modes: there are cases where vector processing requires frequent cooperation of scalar processing, and there are cases where vector processing is relatively independent and only needs a small amount of scalar processing cooperation, and Among the core algorithm modules, scalar processing is the main method. Generally speaking, the application...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F9/30G06F9/38
Inventor 陈书明王耀华万江华刘衡竹郭阳刘宗林龚国辉鲁建壮许邦建胡春媚
Owner NAT UNIV OF DEFENSE TECH
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