Looking for breakthrough ideas for innovation challenges? Try Patsnap Eureka!

Field programmable gate array (FPGA)-based final test (FT) method of liquid crystal display controller (LCDC) module

A testing method and a technology of collecting modules, which are applied in the fields of electronic circuit testing, optics, instruments, etc., can solve problems such as the influence of the yield rate of chip testing, the inability to test the function of the LCDC module, and the inability to test whether the function of another module is correct, etc., to achieve Auxiliary FT test, get rid of interference, reduce the effect of restraint

Active Publication Date: 2011-03-30
FUZHOU ROCKCHIP SEMICON
View PDF3 Cites 3 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] The shortcoming of the prior art test method is that when there is a problem in any part of the LCDC or VIP module, it is impossible to test whether the function of another module is correct
That is to say, if the function of the VIP module is abnormal, it is impossible to test whether the function of the LCDC module is normal; conversely, when the function of the LCDC module is abnormal, it is also impossible to test whether the function of the VIP module is normal, so that the final test yield of the chip will be greatly affected. influences

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Field programmable gate array (FPGA)-based final test (FT) method of liquid crystal display controller (LCDC) module
  • Field programmable gate array (FPGA)-based final test (FT) method of liquid crystal display controller (LCDC) module

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0021] see figure 1 , is a schematic diagram of the LCDC module test. figure 1 Among them, clk, hsync, rst, and vsync are input control signals provided by the chip under test. As long as the timing of these four signals is correct, the correct enable control signal can be generated. The enable signal is used to control when to start collecting data , when to end the collection, so that the required data can be collected correctly. data_in[23..0] is the input data signal provided by the chip to be tested. The data bits are 24 bits in total. The collected data data_out[23..0] is stored in the specified memory address. Specifically include the following steps:

[0022] Step 10: Design a VIP acquisition module in FPGA;

[0023] Step 20: According to the timing of the LCDC and the V_BP (behind the field blanking), V_FP (before the field blanking), V_VD (vertical effective resolution), V_PW (field pulse width), H_BP (behind the line blanking), H_FP of the screen (line blanking)...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention provides a field programmable gate array (FPGA)-based final test (FT) method of a liquid crystal display controller (LCDC) module, which is characterized in that a VIP acquisition module is designed in an FPGA, wherein the VIP acquisition module is used for acquiring data sent by the LCDC module; according to time sequence of the LCDC module and V_BP, V_FP, V_VD, H_BP, H_FP and H_VD parameters of a screen, a count 1 and a count 2 are designed, wherein the count 1 starts counting at the frequency of DOTCLK, and the count 2 starts to count at the frequency of horizontal synchronization signal (HSYNC), the operation is repeated until the LCDC module does not send out the data, which shows the end of the sampling; and finally exporting the acquired data to a file and comparing the acquired data with a data file sent by a memorizer. By using the FPGA-based FT test method of the LCDC module of the invention, any digital circuit can be flexibly realized, interference of analog signals can be eliminated, restriction of special chips can be reduced, and the FT test of chips to be tested can be assisted.

Description

【Technical field】 [0001] The invention relates to a chip testing technology, in particular to an FT testing method of an FPGA-based LCDC module. 【Background technique】 [0002] The test after IC packaging and before leaving the factory is FT (final test) test. FT tests include LCDC, VIP, I 2 S and other modules of the test. [0003] LCDC module: LCD_Controler (LCD controller) referred to as LCDC, it is a driver that controls the data information in the memory to be displayed on the LCD screen. LCDs physically consist of glass, drivers and controllers. Logically, the lines are composed of pixels, and the lines form a plane, depending on the chromaticity and brightness (or RGB value) of each point. Generally, the driver drives each pixel one by one at a speed of about 50HZ to present one or another beautiful or beautiful scene. Not a pretty picture. The driver's chromaticity and brightness information are obtained from the controller. [0004] The test method of the LCDC...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
IPC IPC(8): G02F1/13G01R31/28
Inventor 张英周敏心薛志明
Owner FUZHOU ROCKCHIP SEMICON
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Patsnap Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Patsnap Eureka Blog
Learn More
PatSnap group products