Optimal maintaining pipe domino circuit used for high-performance VLSI (Very Large Scale Integrated Circuit)

A technology that maintains tubes and high performance. It is applied in logic circuits, electrical components, and pulse technology. It can solve the problems of reducing circuit speed, increasing circuit power consumption, and large power consumption, so as to increase power consumption and improve anti-noise ability, circuit delay optimal effect

Inactive Publication Date: 2011-04-27
BEIJING UNIV OF TECH
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Also, the larger the holding tube, the greater the power consumed by the circuit
Therefore, the larger size of the holding tube effectively improves t

Method used

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  • Optimal maintaining pipe domino circuit used for high-performance VLSI (Very Large Scale Integrated Circuit)
  • Optimal maintaining pipe domino circuit used for high-performance VLSI (Very Large Scale Integrated Circuit)
  • Optimal maintaining pipe domino circuit used for high-performance VLSI (Very Large Scale Integrated Circuit)

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Embodiment Construction

[0021] The present invention will be further described below in conjunction with the accompanying drawings and embodiments.

[0022] This embodiment applies the optimal holding tube technique to a Domino OR gate.

[0023] like Figure 4 The optimal holding tube domino OR gate is shown, which consists of several parts:

[0024] Input signal terminal, output signal terminal, clock signal terminal, pre-charge tube, hold tube, clock tube, output static inverter and pull-down network (PDN), where the power supply voltage and substrate voltage of the hold tube are V ddL and V b , except for the holding tube, the power supply voltage and substrate voltage of the other PMOS tubes are V dd , the substrate voltage of all NOMS tubes in the circuit is the ground voltage Gnd, and the magnitude relationship of the voltage is: Gndb ddL dd .

[0025] The low power supply voltage holding tube has two important functions: first, the low power supply voltage can effectively reduce the dynami...

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Abstract

The invention relates to an optimal maintaining pipe domino circuit used for a high-performance VLSI (Very Large Scale Integrated Circuit), i.e. in the domino circuit, the balance of a plurality of important parameters of dynamic power consumption, leakage current, noise margin, circuit delay, process fluctuation resisting coefficients and the like is realized by applying an optimal maintaining pipe technology through regulating the substrate voltage and the power supply voltage of the maintaining pipe, therefore, the domino circuit reaches optimal comprehensive property, wherein the power supply voltage and the substrate voltage of the maintaining pipe are respectively VddL and Vb, the power supply voltages and the substrate voltages of left PMOS (P-channel Metal Oxide Semiconductor) pipes except the maintaining pipe are Vdd, the substrate voltages of all NOMS (N-channel Metal Oxide Semiconductor) pipes in the circuit are ground voltages Gnd, and the relation of the voltages is: Gnd<Vb<VddL<Vdd.

Description

technical field [0001] The invention relates to a low power consumption circuit, in particular to a low power consumption domino circuit using optimal holding tube technology, which belongs to the application field of integrated circuits. Background technique [0002] Domino circuits are widely used in the critical path of processors and memories due to their excellent characteristics of fast speed and small area. They are the most mainstream dynamic logic circuits for high-performance processors and memories. The standard domino circuit is an important branch of the CMOS circuit, which is composed of a dynamic logic block composed of a group of NMOS tubes and a static inverter, such as figure 1 shown. The working principle of the circuit is as follows: when the clock signal CLK=0, it is the pre-charging stage of the circuit. At this time, the pre-charging PMOS transistor P1 is in the conduction state, and the dynamic node is pre-charged to the high level V dd , the output...

Claims

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Application Information

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IPC IPC(8): H03K19/017H03K19/096
Inventor 汪金辉吴武臣侯立刚宫娜耿淑琴张旺袁颖
Owner BEIJING UNIV OF TECH
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