Fourier transform implementation method based on reconfigurable technology

A technology of Fourier transform and implementation method, applied in complex mathematical operations and other directions, can solve problems such as poor flexibility and defective performance, and achieve the effect of high flexibility and high computing efficiency

Inactive Publication Date: 2011-05-04
SOUTHEAST UNIV
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  • Abstract
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Problems solved by technology

[0003] The processor method can flexibly implement various applications, but it has defects in performance; while the hardware logic implementation has high performance, but poor flexibility

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  • Fourier transform implementation method based on reconfigurable technology
  • Fourier transform implementation method based on reconfigurable technology
  • Fourier transform implementation method based on reconfigurable technology

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Embodiment Construction

[0027] The present invention will be further described below in conjunction with the accompanying drawings.

[0028]Explanation 1: The English words used below represent the meanings: Discrete Fourier Transform (DFT), Reconfigurable Array (Reconfigurable Array, RCA), ARM (the name of a microprocessor), AHB (a system bus Name), direct memory access controller (DMAC), arithmetic unit (PE), master (master), slave (slave), arithmetic logic unit (Arithmetic Logic Unit, ALU), Fast Fourier Transform (Fast Fourier Transform, FFT ), embedded reconfigurable array system on chip (system on chip, SoC), discrete Fourier transform (Discrete FourierTransform, DFT).

[0029] Table 1 is a description of the reconfigurable array internal registers involved in the FFT algorithm implementation method based on reconfigurable technology of the present invention;

[0030] Table 2 shows configuration information for configuring a reconfigurable array in a 2048-point FFT algorithm implementation meth...

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Abstract

The invention relates to a Fourier transform implementation method based on a reconfigurable technology. In the method, aiming at the common point-based discrete Fourier transform algorithm, the point-based fast Fourier transform computing is decomposed into M exponent arithmetic processes, each exponent arithmetic is composed of N/2 butterfly arithmetics, and each butterfly arithmetic utilizes one twiddle factor, wherein M is any positive integer, and N is the length of a sequence needing to be subject to Fourier transform, namely a corresponding value. The method can be applied to an embedded system which comprises a bus, an embedded microprocessor, a memory, a reconfigurable array and a direct memory access (DMA) controller, wherein the embedded microprocessor, the memory, the reconfigurable array and the DMA controller respectively communicate with the bus. By utilizing the method, the computing efficiency is improved.

Description

technical field [0001] The invention belongs to the field of embedded information technology, a method for realizing a fast Fourier transform (Fast Fourier Transform, FFT) algorithm based on reconfigurable technology, which can be applied to high-performance embedded reconfigurable array system-on-chip (OSC) oriented to mobile communication terminals System on chip, SoC) optimization of communication baseband algorithm in chip design. Background technique [0002] In the computing model that the public has become accustomed to, processors and application-specific integrated circuits (ASICs) have always been the two mainstreams. With the continuous improvement of application fields, especially embedded environments, for system performance, energy consumption, time-to-market and other indicators, traditional computing models have exposed various drawbacks. [0003] The processor method can flexibly implement various applications, but it has defects in performance; while the h...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F17/14
Inventor 王学香范烨秋曹鹏刘新宁单伟伟时龙兴
Owner SOUTHEAST UNIV
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