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Semiconductor devices and methods

A technology of semiconductors and devices, applied to semiconductor devices and their fields

Inactive Publication Date: 2011-05-11
INFINEON TECH AG
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The second part between the end of the transistor inversion channel and the drain contact causes a larger amount of noise in the total noise of the LDMOS device

Method used

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  • Semiconductor devices and methods
  • Semiconductor devices and methods
  • Semiconductor devices and methods

Examples

Experimental program
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Embodiment Construction

[0012] Described herein are structures of semiconductor devices, such as LDMOS devices, and systems and methods of forming semiconductor devices, such as LDMOS devices.

[0013] According to one embodiment, the LDMOS device includes: a first doped region (for example, a well) in a semiconductor substrate, a trench isolation region, an area covering at least a part of the first doped region (for example, a well) and the trench isolation region. At least a portion of the gate, a second doped region between the first doped region and the trench isolation region. The second doped region forms a p-n junction with the first doped region having a space charge region between the first doped region and the second doped region.

[0014] According to another embodiment, the LDMOS device includes: a first doped region, a trench isolation region, and a second doped region at least partially surrounding the trench isolation region in the first doped region. The second doped region has the ...

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Abstract

Disclosed herein are Lateral Diffused Metal Oxide Semiconductor (LDMOS) device and trench isolation related devices, methods, and techniques.

Description

Background technique [0001] Laterally diffused metal-oxide-semiconductor (LDMOS) transistor devices are commonly used to interface integrated circuits to high supply voltages that exceed the internal operating voltage of the integrated circuit. By weakening the electric field across the transistor gate oxide, the LDMOS device structure protects the transistor's gate dielectric from dielectric breakdown due to high supply voltages. The weakening of the electric field is carried out in the "on" state and in the "off" state by the impedance element which additionally also forms the electric field relief structure. In the "on" state, the electric field is released by the voltage drop across the resistive element. In the "off" state, the electric field is weakened by the electric field relief structure. [0002] In system-on-chip (SoC) solutions, a large number of LDMOS devices are required to provide different supply voltages to different circuit parts and to isolate different c...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L29/78H01L29/06H01L21/336
CPCH01L21/2236H01L21/26506H01L29/0619H01L29/0653H01L29/0847H01L29/66659H01L29/7835H01L21/26586H01L29/0852H01L21/2658H01L21/02057H01L21/26513H01L21/30604H01L21/324H01L21/76237H01L29/66681
Inventor 乔瓦尼·卡拉布雷塞多玛格杰·西普拉克沃尔夫冈·莫尔泽尔乌韦·霍戴尔
Owner INFINEON TECH AG