Asymmetric phase-change memory unit and element
A phase-change memory and phase-change storage technology, applied in the field of phase-change storage, can solve the problems of pulse current heat dissipation, impeding the power consumption of phase-change memory unit devices, and the heat generation affecting the integration of high-density device unit arrays, etc., to reduce Device power dissipation, improved thermal performance, effect of low surface temperature values
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Embodiment 1
[0040] In this embodiment, the fabricated eight-cell asymmetric phase-change memory device is as image 3 Shown: a, b, c, d, e, f, g, h represent eight units respectively, TE represents the upper electrode, BE represents the lower electrode. Each unit can implement functions such as writing, reading and erasing. The cell structure of the asymmetric phase change memory device is as follows Figure 4 As shown: the lower electrode layer 5 is made of TiW, its width L7=12um, and its thickness h6=150nm.
[0041]The first insulating layer 4 is made of SiO2 material, its width L8=20um, and its thickness h7=200um. The first insulating layer 4 has a small hole with a width of L11 = 2um, and the central axis a1 of the small hole is horizontally shifted to the left by d1 = 1.5um relative to the central axis a3 on the lower electrode 5 .
[0042] The material used for the phase change layer 3 is Ge2Sb2Te5, its width L9=10um, and its thickness h8=150nm.
[0043] The second insulating la...
Embodiment 2
[0047] In this embodiment, an eight-unit asymmetric phase-change memory is manufactured, and the structure of the asymmetric phase-change memory unit is as follows Figure 5 As shown: the lower electrode layer 5 is made of Cu, its width L7=10um, and its thickness h6=100nm.
[0048] The first insulating layer 4 is made of TiO2 material, its width L8=15um, and its thickness h7=150um. The first insulating layer 4 has a small hole with a width of L11 = 1 um, and the central axis a1 of the small hole is horizontally shifted to the right by d1 = 1.5 um relative to the central axis a3 on the bottom electrode 5 .
[0049] The material used for the phase change layer 3 is Ge1Sb4Te7, its width L9=10um, and its thickness h8=100nm.
[0050] The second insulating layer 2 is made of TiO2 material, its width L10=20um, and its thickness h9=150nm. The second insulating layer 2 has a small hole with a width L12 = 2um, and the central axis a2 of the small hole is horizontally shifted to the le...
Embodiment 3
[0053] In this embodiment, the fabricated asymmetric phase-change memory device has a structure of an asymmetric phase-change memory cell such as Figure 6 As shown: the lower electrode layer 5 is made of Ag, its width L7=30um, and its thickness h6=500nm.
[0054] The first insulating layer 4 is made of amorphous Si material, its width L8=40um, and its thickness h7=500um. The first insulating layer 4 has a small hole with a width of L11 = 4um, and the central axis a1 of the small hole is horizontally shifted to the right by d1 = 4um relative to the central axis a3 on the lower electrode 5 .
[0055] The material used for the phase change layer 3 is GeTe. Its width L9=30um, thickness h8=500nm.
[0056] The second insulating layer 2 is made of amorphous Si material, its width L10=40um, and its thickness h9=500nm. The second insulating layer 2 has a small hole with a width of L12 = 6um, and the central axis a2 of the small hole is horizontally shifted to the left by d2 = 6um r...
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