Digital static calibration circuit of digital-to-analog converter (DAC)

A technology for calibrating circuits and calibrating currents, applied in the direction of analog/digital conversion calibration/testing, etc., can solve the problems of feasibility limitation, impracticality, instability, etc., and achieve the goal of reducing design difficulty, reducing area, and low power consumption Effect

Inactive Publication Date: 2011-05-25
BEIJING MXTRONICS CORP +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

However, the feasibility of laser trimming is limited due to the special process required and the possible thermomechanical stress induced
However, the method of adjusting the bias voltage has the instability problem caused by the drop of the power supply voltage, and the method of adjusting the bias voltage has the problem of instability caused by the drop of the power supply voltage, which requires continuous refreshing to generate the work of the bias circuit. conditions to ensure bias voltage stability, so it is not practical to apply this method

Method used

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  • Digital static calibration circuit of digital-to-analog converter (DAC)
  • Digital static calibration circuit of digital-to-analog converter (DAC)
  • Digital static calibration circuit of digital-to-analog converter (DAC)

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Embodiment

[0054] In the following, a further introduction will be made in conjunction with the embodiments. For the convenience of description, the accuracy of the current-mode DAC calibration circuit in this embodiment is 16 bits, adopts the "7+4+5" segmentation method, the MSB has 7 bits, and the thermometer encoding method is used, and the LSB has 9 bits, and the thermometer encoding is used. combined with binary encoding. The number of bits for calibrating the DAC is 6, that is, K=6.

[0055] Calibrate the reference current source first before the calibration circuit works. The specific calibration method is: design an appropriate value for the reference current to ensure that the calibrated current can approach the reference current successively within the calibration range of the corresponding calibration circuit, and there is a calibration DAC in the calibration DAC array to calibrate the reference current source of. At the beginning of the calibration, in addition to the cali...

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Abstract

The invention discloses a digital static calibration circuit of a digital-to-analog converter (DAC), which can be used for calibrating a most significant bit (MSB) current source and a least significant bit (LSB) total current source in a current mode DAC. The calibration circuit can operate in a calibration mode and an output mode respectively under the control of external signals. The calibration circuit comprises an address generator, a switch array, a sequential approximation logical module, a calibration DAC array, a memory, a comparator and an integrated current gain module, wherein theintegrated current gain module comprises a current source array for regulating integral current, a paired choice, a full-scale adjusting resistor and an amplifier. The calibration circuit is used forovercoming the difficulty that the accuracy of the current mode DAC is limited, realizing the high static linearity of the DAC, and improving the accuracy of the current mode DAC.

Description

technical field [0001] The invention relates to a current-type DAC calibration circuit, which is mainly used for calibrating the current source of a segmented current-type DAC, and belongs to the technical field of mixed-signal integrated circuits. Background technique [0002] In recent years, the demand for high-speed communication systems has been increasing. As the interface between the digital world and the analog world, the module digital-analog converter is becoming more and more important, and the precision and speed of the module digital-analog converter also determine the precision and speed of the whole system. Therefore, high-precision digital-to-analog converters put forward higher requirements. [0003] However, due to the limitation of the matching performance of the process technology, academic and industrial practices have shown that for DACs with a resolution of 16 bits or more, no matter whether the random mismatch control method or the system mismatch co...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H03M1/10
Inventor 王立果王宗民孔瀛管海涛彭新芒
Owner BEIJING MXTRONICS CORP
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