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Annealing genetic optimization method for diagnosing excitation of nonlinear analog circuit

An analog circuit and genetic optimization technology, applied in analog circuit testing, electronic circuit testing, genetic modeling, etc., can solve problems such as imperfect fault diagnosis theories and methods, needing further research, etc., to shorten the parameter determination time and enhance the global search. Excellent effect, enhanced usability effect

Inactive Publication Date: 2013-12-11
HARBIN UNIV OF SCI & TECH
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0002] Due to the ubiquitous non-linear and soft fault characteristics of analog circuits, its fault diagnosis theory and methods are still not perfect, and to a certain extent it has become a bottleneck restricting integrated circuit testing; although research in this area in recent years Continuous progress has been made, however, system analysis and modeling, optimization and practical application of test incentives need further research

Method used

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  • Annealing genetic optimization method for diagnosing excitation of nonlinear analog circuit
  • Annealing genetic optimization method for diagnosing excitation of nonlinear analog circuit
  • Annealing genetic optimization method for diagnosing excitation of nonlinear analog circuit

Examples

Experimental program
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Embodiment 1

[0034] An annealing genetic optimization method motivated by nonlinear analog circuit diagnosis, the steps of the annealing genetic optimization method stimulated by nonlinear analog circuit diagnosis:

[0035] (1) First determine the normal working state and various fault states of the nonlinear analog circuit under test;

[0036] (2) Apply a multi-frequency excitation signal to the measured nonlinear analog circuit in each of the fault states, measure the input and output signals at the same time, obtain a sampling data sequence, and obtain the fault states of the circuit under test through data processing Corresponding to the first n-order Volterra frequency domain kernel;

[0037] (3) The parameter selection of the test excitation signal is used as an optimization problem, and the aggregate Euclidean distance of the response of various fault states under a certain excitation signal is used as the evaluation function of the signal, and the simulated annealing algorithm and ...

Embodiment 2

[0039] The annealing genetic optimization method of the non-linear analog circuit diagnostic excitation described in embodiment 1, in the described step (1), determine the m kinds of states of the non-linear analog circuit under test, and carry out numbering, including:

[0040] (a) It is determined that all components of the nonlinear analog circuit under test are in a normal state with nominal parameters;

[0041] (b) Determine the soft fault states such as the actual value of the element in the non-linear analog circuit being tested is too large or too small;

[0042] (c) Determine the hard fault states such as short circuit and open circuit of the components in the tested nonlinear analog circuit;

[0043] (d) Number the various states mentioned above, which are respectively 1, 2, ..., m, where m is a natural number.

Embodiment 3

[0045] The annealing genetic optimization method of the non-linear analog circuit diagnosis excitation described in embodiment 1 or 2, in described step (2), the first n order Waltera Volterra frequency domain kernels of each fault state obtain by following steps:

[0046] (a) Make the non-linear analog circuit under test in fault state 1;

[0047](b) Apply a multi-frequency signal to the above circuit as an input signal, and measure the input and output signals at the same time to obtain the sampling sequence data, and use the multidimensional Fourier transform to obtain the first n-order Volterra frequency domain kernel k 10 , k 11 , k 12 , k 13 …k 1n ;

[0048] (c) Make the non-linear analog circuit under test in fault state 2, 3, ... m in sequence, repeat step (b), and obtain the Volterra frequency domain kernel k of various states i0 , k i1 , k i2 , k i3 …k in , where i=1, 2, 3, . . . m.

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Abstract

The invention discloses an annealing genetic optimization method for diagnosing excitation of a nonlinear analog circuit. Due to nonlinearity, soft fault and other hardly diagnosed characteristics of the common analog circuit, fault diagnosis theory and method are not perfect and become a bottleneck of restricting a test of an integrated circuit to a certain degree. The method comprises the following steps of: determining various states of a tested nonlinear analog circuit; applying a multi-frequency excitation signal to the tested nonlinear analog circuit in various states, measuring input and output signals to obtain a sampling data sequence, and performing data processing to obtain a previous n-order Volterra frequency-domain kernel corresponding to each fault state of the tested circuit; and taking parameter selection of the tested excitation signal as an optimization problem, taking lumped Euclidean distance responding to various fault states of a certain excitation signal as an evaluation function of the signal, optimizing the tested excitation signal by using the annealing genetic optimization method, and finally obtaining optimized excitation signal parameters. The method is used for fault diagnosis of an electronic circuit.

Description

Technical field: [0001] The invention relates to a feature extraction, pattern recognition and fault diagnosis technology of a nonlinear analog circuit, and is a method for optimizing test excitation signals in the process of fault diagnosis; in particular, it relates to a combination of simulated annealing method and genetic algorithm based on Volterra A Test Stimulus Optimized Method for Volterra Frequency-Domain Core Fault Diagnosis. Background technique: [0002] Due to the ubiquitous non-linear and soft fault characteristics of analog circuits, its fault diagnosis theory and methods are still not perfect, and to a certain extent it has become a bottleneck restricting integrated circuit testing; although research in this area in recent years Progress has been made, however, system analysis and modeling, optimization and practical application of test incentives are still to be further studied. [0003] The fault dictionary method is one of the most practical analog circu...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G01R31/316G06N3/12
Inventor 林海军
Owner HARBIN UNIV OF SCI & TECH
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