CMOS (Complementary Metal Oxide-Semiconductor) voltage multiplying circuit
A voltage multiplication and circuit technology, applied in the direction of adjusting electrical variables, control/regulation systems, instruments, etc., to meet the needs of circuit performance and reduce circuit cost and power consumption
Active Publication Date: 2012-08-15
SHANGHAI BEILING
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Problems solved by technology
But sometimes the circuit needs a higher voltage to achieve a certain performance. Therefore, how to generate a voltage higher than the power supply voltage and twice the input reference voltage in a low power supply voltage environment is an urgent need for people in the industry to solve. technical problem
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[0014] Specific embodiments of the present invention will be described in detail below in conjunction with the accompanying drawings.
[0015] Such as figure 1 As shown, the present invention is a CMOS voltage multiplication circuit, which includes a first CMOS switch module, a second CMOS switch module, first and second energy storage capacitors C1, C2 and an output capacitor Co.
[0016] The first CMOS switch module includes first to seventh PMOS transistors P1 to P7 and first to fourth NMOS transistors N1 to N4, wherein,
[0017] The sources of the first to fourth NMOS transistors N1 to N4 are connected to the ground GND;
[0018] The drain and gate of the first NMOS transistor N1 and the first PMOS transistor P1 are respectively connected, the source of the first PMOS transistor P1 is connected to the drain of the second PMOS transistor P2, and receives an external reference voltage Vref;
[0019] The gate of the second PMOS transistor P2 is connected to the drain of the...
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The invention relates to a CMOS (Complementary Metal Oxide-Semiconductor) voltage multiplying circuit comprising a first CMOS switch module, a second CMOS switch module, a first energy storage capacitor, a second energy storage capacitor and an output capacitor, wherein the first CMOS switch module comprises first to seventh PMOS (P-channel Metal Oxide Semiconductor) transistors and first and fourth NMOS (N-channel Metal Oxide Semiconductor) transistors, and the second CMOS switch module comprises eighth to fourteenth PMOS transistors and fifth to eighth NMOS transistors. The PMOS transistorsand the NMOS transistors have inverse switch working properties, and by utilizing the property of no voltage mutation on both ends of the capacitors, the CMOS voltage multiplying circuit is controlled to charge and discharge the first energy storage capacitor and the second energy storage capacitor by complementary two-phase clock signals through controlling the on / off of the PMOS transistors andthe NMOS transistors so that a stable voltage twice higher than an input reference voltage is generated on an output end, therefore the purpose of meeting the requirement for circuit performance is achieved in the condition of reducing circuit cost and power consumption.
Description
technical field [0001] The invention relates to an integrated circuit, in particular to a CMOS voltage multiplication circuit. Background technique [0002] In the power management circuit and some low-voltage application environments, in order to reduce the cost and power consumption of the circuit, the power supply voltage is relatively low. But sometimes the circuit needs a higher voltage to achieve a certain performance. Therefore, how to generate a voltage higher than the power supply voltage and twice the input reference voltage in a low power supply voltage environment is an urgent need for people in the industry to solve. technical problem. Contents of the invention [0003] In order to solve the above-mentioned problems in the prior art, the present invention aims to provide a CMOS voltage doubling circuit to generate a voltage twice the input reference voltage in a lower power supply voltage environment, thereby reducing circuit cost and power consumption. Unde...
Claims
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IPC IPC(8): G05F1/10
Inventor 陶园林
Owner SHANGHAI BEILING