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Automatic positioning method for physical short circuit positions among multiple line networks

A technology for automatic positioning and short-circuit location, applied in electrical digital data processing, special data processing applications, instruments, etc. It can solve the problem of inefficient manual positioning of physical short-circuits in the wire network, and achieve the effect of optimizing design correction quality and improving design efficiency.

Active Publication Date: 2011-07-06
INST OF MICROELECTRONICS CHINESE ACAD OF SCI
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] In view of this, the purpose of the present invention is to provide an automatic positioning method for the location of physical short circuits between multi-line nets, which is used to solve the problem of inefficiency in manual positioning of physical short circuits in line nets

Method used

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  • Automatic positioning method for physical short circuit positions among multiple line networks
  • Automatic positioning method for physical short circuit positions among multiple line networks
  • Automatic positioning method for physical short circuit positions among multiple line networks

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Embodiment Construction

[0018] The embodiment of the present invention provides the positioning of the location of the physical short circuit, the automatic deletion of the physical short circuit, the automatic correction of the physical connection of the line network, and the automatic deletion of the redundant physical pattern of the line network after the layout design of the integrated circuit and the LVS inspection. A method for automatically locating and correcting the location of a physical short circuit between multi-wire nets.

[0019] The embodiment of the present invention receives data such as circuit diagram / circuit netlist, physical layout, and LVS inspection results, and establishes an abstract diagram according to the data such as circuit diagram / circuit netlist, physical layout, and LVS inspection results, and simplifies the abstract diagram. The short-circuit problem is automatically transformed into a physical short-circuit problem between two wire nets; the graph-based calculation ...

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Abstract

The invention discloses an automatic positioning method for physical short circuit positions among multiple line networks, and belongs to the technical field of electronic design automation. The method comprises the following steps of: receiving a circuit diagram / circuit network table, physical layout data and layout versus schematic (LVS) result data; and establishing an abstract diagram according to the circuit diagram / circuit network table, the physical layout data and the LVS result data, and simplifying the abstract diagram so as to complete automatic positioning of physical connection short circuits of the multiple line networks on the simplified abstract diagram. By using the method, automatic positioning of the physical short circuits among the multiple line networks during integrated circuit physical layout design can be automatically realized to replace a designer to manually seek the physical short circuit positions on the physical layout, so that the design efficiency of the physical layout is improved.

Description

technical field [0001] The invention relates to the technical field of electronic design automation (EDA), in particular to an automatic positioning method for the physical short circuit position between multi-line nets. Background technique [0002] After the physical layout of the integrated circuit is designed according to the circuit diagram, it is necessary to use LVS (physical layout and circuit Figure 1 Consistency) tool checks the consistency between the physical layout and the circuit diagram, and finds out the inconsistencies between the two for modification, so as to finally ensure that the physical layout and the circuit diagram are completely consistent. Physical layout design is a complex and cumbersome work. During the physical layout design process, due to the negligence of designers or defects in software tools, it is easy to cause short circuits between physical connections of different nets, resulting in multiple independent circuits on the circuit diagram...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F17/50
Inventor 吴玉平陈岚叶甜春
Owner INST OF MICROELECTRONICS CHINESE ACAD OF SCI
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