Welltie cell inserting method based on tapless standard cell library

Abstract

The invention discloses a welltie cell inserting method based on a tapless standard cell library, which comprises the following steps: acquiring actual positions of preset original points of all hard modules in a floor plan, which are positioned in the floor plan; determining position coordinates of each welltie cell to be inserted and the size of a window according to the acquired actual position of the preset original point of each hard module in the floor plan; inserting the required welltie cells according to the position coordinates of each welltie cell to be inserted and the size of the window; and inserting a row of welltie cells at the preset distance away from one side of a hard model array on the outermost side of a chip, on which the welltie cell is not inserted. By using the welltie cell inserting method, the insertion process of the welltie cell can be automatically finished and the maintenance cost and the manufacturing cost of the system are reduced.

Description

technical field [0001] The invention relates to the manufacturing technology of semiconductor components, in particular to a method for inserting a tapless cell based on a tapless standard cell library. Background technique [0002] In order to overcome some system performance improvement problems caused by multi-chip integrated systems, the system-on-chip (SOC, System On Chip) technology was proposed in the 1990s, so as to improve the chip-integrated system by taking the embedded system as the core. function for higher system performance. [0003] With the continuous development of integrated circuit technology, SOC design has become the development direction of integrated circuit design. In the SOC chip, a large number of microprocessors, digital signal processors (DSP), analog / digital converters (ADC), digital / analog converters (DAC), analog filters, memories and radio frequency (RF) units are integrated And other devices, the design scale of the chip has far exceeded t...

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Problems solved by technology

[0007] However, due to the above-mentioned lining insertion process, manual participation is required, and complete automatic insertion cannot be realized, so that the entire lining insertion process cannot be fully automated, which increases maintenance costs; moreover, because the above-mentioned detection must be done manually , so in the above detection process, the problem of missed detection is more likely to occur, and the detection time is relatively long; in addition, if the insertion step is reduced to allow a few labeling units to find available welltie Excessive insertion will increase the area of ​​the chip, thereby increasing the manufacturing cost of the device

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