Startup acceleration circuit of reference voltage circuit

Abstract

The invention discloses a startup acceleration circuit of a reference voltage circuit, and the startup acceleration circuit is connected on an output circuit of the reference voltage circuit and comprises a first PMOS (positive-channel metal oxide semiconductor) pipe, a third PMOS pipe, a startup current circuit and a bias current circuit, wherein a gate of the first PMOS pipe and the gate of an output PMOS pipe in the output circuit in the reference voltage circuit are connected with bias voltage generated by the reference voltage circuit together, a source is connected with a power supply, a drain is connected with the gate of the third PMOS pipe and one end of the bias current circuit, the other end of the bias current circuit is grounded, one end of the startup current circuit is connected with the power supply, the other end of the startup current circuit is connected with the source of the third PMOS pipe, and the drain of the third PMOS pipe is connected with the reference voltage output end of the reference voltage circuit. The startup acceleration circuit of the reference voltage circuit can reduce startup time of the voltage reference circuit and improve startup speed ofthe voltage reference circuit.

Description

technical field [0001] The invention relates to semiconductor integrated circuit design, in particular to a start-up acceleration circuit of a reference voltage circuit. Background technique [0002] With the continuous development of the integrated circuit industry and the continuous improvement of the market, customers have higher and higher requirements for the performance of electronic products, and require the products to be powered on and started faster and faster; thus, in order to save the start-up time of the entire product, It is required that each IP (intellectual property core) of the product can be controlled to improve the startup time, thereby improving performance. [0003] Common reference voltage circuit, its output circuit such as figure 1 As shown, it includes an output PMOS transistor M2 and an output resistor R2. The gate of the output PMOS transistor M2 is connected to the bias voltage Vbias generated by the reference voltage circuit, the source is co...

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Problems solved by technology

[0004] like figure 1 As shown, the reference voltage circuit outputs the reference voltage Vref to the load Cload, and the load Cload is connected in parallel with the output resistor R2. When the load Cload is too large, it will take a long time for the reference voltage circuit to output the reference voltage Vref to reach the set value, and the reference voltage Circuit startup is slower

[0005] In order to improve the start-up speed of the reference voltage circuit, the method of increasing the power consumption or start-up current of the reference voltage circuit is usually adopted, or the traditional main circuit structure is changed, but this will increase the consumption of resources in other aspects of the reference voltage circuit correspondingly, and cannot achieve the best performance. Effect

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