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Data processing circuit with elementary processor, data processing assembly including array of such circuits, and matrix sensor including such assembly

A technology for processing circuits and data processing, applied to architectures with multiple processing units, processor architecture/configuration, electrical components, etc., and can solve problems such as readout destructiveness

Inactive Publication Date: 2014-04-09
COMMISSARIAT A LENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The dRAM cell is extremely compact, yet its readout is destructive

Method used

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  • Data processing circuit with elementary processor, data processing assembly including array of such circuits, and matrix sensor including such assembly
  • Data processing circuit with elementary processor, data processing assembly including array of such circuits, and matrix sensor including such assembly
  • Data processing circuit with elementary processor, data processing assembly including array of such circuits, and matrix sensor including such assembly

Examples

Experimental program
Comparison scheme
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Embodiment Construction

[0070] The following describes an elementary processor (PE) according to the invention, the general architecture of which is represented in figure 1 middle.

[0071] Its constituent elements are inverters, in this case two inverters with references Inv1 and Inv2 and forming two conversion circuits, capacitors Ccell, C1, C2 and Cinf, and switches interconnected to each other Mi, R1, W1, R2, W2. There is also an inherent parasitic capacitance referenced Cbus.

[0072] These are operators and each can be formed differently. The inverter can be a CMOS inverter or an operational amplifier type arrangement, arranged as a comparator, in particular a transconductance operational amplifier, the voltage-voltage characteristic of the inverter is an inverted S-shape, see their symbols and figure 1 the lower left corner of the . For compactness, it is advantageous to use a single type of N or P transistor to make the switch (instead of its usual form of two complementary transistors in...

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PUM

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Abstract

A data processing circuit includes a data processing unit including two signal-conversion circuits and controlled switches connected to inputs and outputs of the conversion circuits. The data processing unit further includes a binary signal inlet, a binary signal outlet, and a memory unit. The memory unit includes capacitors each storing a binary piece of data. The capacitors are connected to a memory bus via switches. The bus is connected to the processing unit. In response to control signals provided to the controlled switches, the data processing unit performs at least the following operations: writing a binary datum in a capacitor, reading from a capacitor a binary datum stored therein and applying the datum to an output, and logically combining binary data stored in at least two capacitors.

Description

technical field [0001] The present invention generally relates to data processing circuits of data source components such as matrix sensors. [0002] The invention also relates to a matrix sensor comprising a set of detection units forming said data source and equipped with a plurality of said processing circuits. [0003] In a particular application, the invention relates to the data processing of a detection unit such as a photosensitive unit for artificial vision, wherein said sensor forms an artificial retina. Background technique [0004] The purpose of artificial vision techniques is to determine, from a sequence of images of a scene provided by a camera, certain actual features of the scene observed, in order to perform actions related to said scene in a time that may be short or long. [0005] Over the years, many modules of cameras have been digital. Whereas image sensors inherently provide analog data, these digital cameras provide digital images directly when co...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F15/80G06T1/20G11C19/18H01L27/146G11C19/38H04N25/00
CPCG11C19/184H04N5/335H04N5/378G11C19/38G06T1/0007H04N25/00H04N25/75
Inventor T·贝尔纳得
Owner COMMISSARIAT A LENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES