Method for encapsulating low-cost chip fan-out structures
A packaging method and chip technology, which are applied in the manufacturing of electrical components, electrical solid-state devices, semiconductor/solid-state devices, etc., to achieve the effect of realizing large-scale production, reducing process difficulty and process cost
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[0030] see Figure 1~Figure 11 , Figure 1~Figure 11 It is an embodiment diagram of each process of the packaging method of the low-cost chip fan-out structure without photolithography according to the present invention. Depend on Figure 1~Figure 11 It can be seen that the packaging method of the low-cost chip fan-out structure of the present invention includes the following process steps:
[0031] Step 1, take the carrier substrate 2-1, such as figure 1 ;
[0032] Step 2. Pre-form an alignment pattern on the carrier substrate 2-1. The size of the carrier substrate matches the loading capacity of the existing flip-chip machine, usually 250X80, 210x70mm; paste a temporary Adhesive film 2-2, the temporary adhesive film should have double-sided adhesive properties and be able to withstand a certain process temperature, such as figure 2 ;
[0033] Step 3. Flip-chip single or multiple chips 2-3-1 / 2-3-2 onto the carrier substrate with a temporary adhesive film, and fix it ...
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