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Output circuit, data driver and display device

A technology for output circuits and output terminals, which is applied to instruments, static indicators, etc., and can solve problems such as inability to suppress through current, increase in area, and increase in the number of transistors

Active Publication Date: 2015-03-11
RENESAS ELECTRONICS CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

For example in Figure 16 In the case of the configuration shown, by adding the control circuit 90, the auxiliary current sources 53 and 54 of the differential input stage 50, and the output auxiliary circuit 100, the through current of the output stage can be suppressed and the slew rate can be increased. The number of transistors increases, the area increases, and the cost increases
In addition, the auxiliary current sources 53 and 54 of the differential input stage 50 are activated to accelerate the charging and discharging of the capacitors 83 and 84. However, the charging and discharging of the capacitors 83 and 84 is performed at a high speed in order to follow the rapid change in the voltage of the output terminal OUT. The current values ​​of the auxiliary current sources 53, 54 must be sufficiently large, so that the consumption current increases
[0072] also, Figure 17 In the circuit of the liquid crystal display device, in the driving of the data line of the liquid crystal display device, the second terminals of the capacitors 31 and 32 are respectively connected to the gates of the output stages 14 and 15 for the change of the same polarity continuous output voltage such as column inversion driving. connection, therefore cannot suppress shoot-through current
Furthermore, in the driving of the data lines of the organic light emitting diode display device, there is no polarity signal, and the through current cannot be suppressed against a large output voltage change.
[0073] also, Figure 18 In the circuit, the change of the output voltage is determined by the current I1, I2 driving the differential pair and the phase compensation capacitors C1, C2. Therefore, in order to speed up the change of the output voltage, it is necessary to increase the current I1 and I2 driving the differential pair. Consumption current increases
In addition, by reducing the phase compensation capacitors C1 and C2, the slew rate is increased, but the output stability is impaired, so it is not practical

Method used

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  • Output circuit, data driver and display device
  • Output circuit, data driver and display device
  • Output circuit, data driver and display device

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Experimental program
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Effect test

Embodiment approach 1

[0166] figure 1It is a figure which shows the structure of the output circuit of 1st Embodiment of this invention. In this embodiment, the output circuit preferably drives a wiring load. Including: a differential amplifier stage 50, receiving the input voltage VI of the input terminal 1 and the output voltage VO of the output terminal 2 through differential; the output amplifier stage 30, receiving the first and second outputs of the differential amplifier stage 50 (node ​​3 , 4) and push-pull operation and the output voltage VO corresponding to the input voltage VI is formed from the Pch transistor 101 and the Nch transistor 102 output from the output terminal 2; the amplification acceleration circuit 10 detects the potential difference between the input voltage VI and the output voltage VO, Amplification and acceleration are performed according to the potential difference; and a capacitance connection control circuit 20 includes capacitance elements C1 and C2 whose first t...

Embodiment approach 2

[0228] Next, a second embodiment of the present invention will be described. image 3 It is a figure which shows the structure of 2nd Embodiment of this invention. refer to image 3 , in this embodiment, relative to figure 1 The configuration of the switch (output switch) SW9 is provided between the wiring load. The output switch SW9 temporarily disconnects the output terminal 2 and the wiring load when switching between output periods.

[0229] While the output switch SW9 is off, the charge transfer from the output terminal 2 to the wiring load is interrupted. Therefore, by the operation of the amplifier acceleration circuit 10, the output voltage VO does not slow down, but rapidly changes to the vicinity of the input voltage VI. Corresponding to the voltage, the capacitors C1 and C2 are also charged and discharged.

[0230] Capacitors C1 and C2 can drive the wiring load at high speed even if the output switch SW9 is turned on by completing charge and discharge correspon...

Embodiment approach 3

[0250] Next, a third embodiment of the present invention will be described. Figure 5 It is a timing waveform diagram illustrating the third embodiment of the present invention. The constitution of this embodiment and image 3 The structure of the above-mentioned embodiment is the same.

[0251] This embodiment is for Figure 4 The timing control has been deformed. Figure 5 With Figure 4 Similarly, the operation of driving the wiring load connected to the output terminal 2 via the output switch SW9 will be described. image 3 A diagram of the control timing of each switch of the output circuit.

[0252] Such as Figure 5 As shown, in this embodiment, the Figure 4 The period T1 is divided into periods T1a and T1b. During the period T1a, the switches SW1, SW2, SW21, and SW23 are turned on, and the switches SW22, SW24 are turned off. During the periods T1b and T2, the switches SW1, SW2, SW21, and SW23 are turned off. The switches SW22, SW24 are turned on. The output s...

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PUM

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Abstract

Disclosed is an output circuit including a differential amplifier stage, an output amplifier stage, an amplification acceleration circuit and a capacitance connection control circuit. The output amplifier stage includes push / pull type transistors connected an output terminal. The amplification acceleration circuit includes a first switch and a first transistor, connected between a first output of the differential amplifier stage and the output terminal, and a second transistor and a second switch connected between the output terminal and a second output of the differential amplifier stage. The capacitance connection control circuit includes first capacitive element having first end connected to the output terminal, a first switch connected between a second end of the first capacitive element and a first voltage supply terminal, and a second switch connected between the second end of the first capacitive element and one output of a first differential pair of the differential amplifier stage.

Description

technical field [0001] The present invention relates to an output circuit for driving a wiring load, a data driver and a display device using the output circuit. Background technique [0002] Recently, among display devices, liquid crystal display devices (LCDs) featuring thinness, light weight, and low power consumption have been widely used, and are mostly used in mobile phones (mobile phones, cellular phones), PDAs (personal digital assistants), and notebook PCs. The display part of the device. Recently, however, the technology for increasing the size of liquid crystal display devices and supporting animation has also improved, and not only mobile applications, but also large-screen display devices of the stand-down type and large-screen liquid crystal televisions have become possible. As these liquid crystal display devices, active matrix drive type liquid crystal display devices capable of high-definition display are used. In addition, a display device of an active ma...

Claims

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Application Information

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IPC IPC(8): G09G3/20G09G3/36G09G3/32
CPCG09G2320/0252G09G2330/021G09G2310/0291G09G3/3688
Inventor 土弘
Owner RENESAS ELECTRONICS CORP