41results about How to "Increased current consumption" patented technology

A drive control device of an unconnected motor capable of resolving power shortage and increasing motor output without using a boost circuit, and an electric power steering device using the unconnected motor. The drive control device comprises an unconnected motor (12) having a rotor in which permanent magnets are allocated and a stator opposing the rotor, in which armature winding Lu to Lw of a plurality (N number) of phases are independently arranged, a pair of inverter circuits (34a, 34b) individually connected to both ends of each armature winding, and a drive control circuit (15) which drives the pair of inverter circuits (34a, 34b) with a predetermined number (e.g. 2N) of PWM drive control signals.

A method of enumerating a peripheral device preferably includes initiating operation of the device in a low-power mode. Power can be conserved, for instance, by slowing processor speed or by shutting off clocks to one or more unneeded blocks of the peripheral device during enumeration. During enumeration, a host computer preferably obtains enumeration information from the peripheral device and then uses that information to select a configuration state for operating the device following enumeration.

An image blur correction device includes: a movable frame which is equipped with a lens or an imaging element and has a guide part; a fixed frame having a guide supporting part which movably supports the movable frame by coming into contact with the guide part; and a drive mechanism which drives the movable frame for correcting image blur by moving the movable frame relative to the fixed frame. The fixed frame has magnetic bodies, and the movable frame has urging magnets at positions corresponding to the magnetic bodies. Specifically, the urging magnets use attractive force between the magnets and the magnetic bodies, so as to urge the movable frame in a direction in which the guide part and the guide supporting part come into contact with each other.

Disclosed is an output buffer circuit including a first differential transistor pair for differentially receiving a data signal from a differential input pair; and a second differential transistor pair for differentially receiving an emphasis data signal from another differential input pair; a pair of output resistor circuits via which the drains of first and second differential transistor pairs are connected to a power supply, said output resistor circuits each including a transistor; and a logic circuit adapted for receiving the data signal and the emphasis signal and for supplying a control signal which is of first and second values at the time of preemphasis and at other times to the transistors of the output resistor circuit, wherein the output resistance is relatively made larger at the time of emphasis, while being relatively smaller at the time of deemphasis.

Disclosed are a display and a method of driving the display. The display includes a display panel on which a plurality of data lines are formed, a data driver for supplying data voltages generated by modulating input image data to the respective data lines. The data driver includes a precharging unit for selecting a specific precharge voltage from a plurality of precharge voltages applied to the data driver depending on grayscale sections of the input image data, and for precharging the selected precharge voltages to the respective data lines.A predetermined voltage is precharged according to a grayscale section of image data and then applied to a pixel, whereby voltage rising time and voltage falling time when charging the pixel can be shortened. Therefore, even though the charge time of the pixel is shortened and bias current of the data driver is thus reduced, it is possible to obtain high driving performance. In addition, since the bias current of the data driver is reduced, overall current consumption is reduced and heat generation can also be suppressed.

In a keyless entry system (100) including an in-vehicle device (10), and a portable device (20) operated by a built-in battery (19), a request signal is transmitted from the in-vehicle device (10) to the portable device (20) so that wireless communication is performed between the in-vehicle device (10) and the portable device (20), the portable device (20) can set first sensitivity that is predetermined sensitivity and second sensitivity that is higher sensitivity than the first sensitivity and at which a detection area for the request signal is wide, as detection sensitivity for detecting the request signal, sets the detection sensitivity to the second sensitivity when determining that the portable device (20) is in the vehicle (50)'s interior (51) or within the predetermined distance from the vehicle (50), and sets the detection sensitivity to the first sensitivity when determining that the portable device (20) is not in or comes to be not in the vehicle's interior (51) or within the predetermined distance from the vehicle (50).

A semiconductor storage device comprising: a transfer control circuit for prefetching data of a predetermined number of bits stored in a memory array in response to a read command, and transferring L bits of the prefetched data in parallel to an internal bus in synchronization with an internal clock; and an output buffer circuit which includes L FIFO buffers each for latching each bit of the L bits input from the internal bus and extracts stored data from each of the L FIFO buffers in accordance with an input sequence in synchronization with an external clock so as to transfer the data serially to outside, wherein each of the L FIFO buffers includes an M-bit latch circuit and an N-bit latch circuit, and paths of the M-bit and N-bit latch circuits can be selectively switched.

Information stored in a nonvolatile storage device mounted to a semiconductor device is read by inputting an address signal or the like and by using a sense amplifier or the like. At this time, since a prescribed period of time is required, it is necessary to design a semiconductor device taking that delay into consideration. Also, a sense amplifier consumes an enormous amount of current. Further, since the number of reading bits is set, it is also necessary to read other unnecessary information when only 1 bit is to be read. A nonvolatile storage circuit is formed by a memory element that is formed by an electrical element having an electrically conducting or insulating means, a reset element, and a latch element. In the storage element, different information is stored in the latch element depending on whether the electrical element is electrically insulated or conductive, when the wireless chip is reset. With such a structure, a low power consumption wireless chip mounted with a nonvolatile storage device can be provided a low cost.

A data processing device including a power supply terminal having a first power supply voltage applied thereto; a regulator that generates a second power supply voltage based on the first power supply voltage; an internal circuit having an operation clock, wherein the second power supply voltage is supplied to the internal circuit through a power supply; and a power supply voltage variation suppressor connected between the power supply terminal and the power supply line. In this device, the power supply voltage variation suppressor sets an auxiliary period and supplies auxiliary current to the power supply line during the auxiliary period, and wherein the auxiliary period is synchronized with the operation clock of the internal circuit.

A constant voltage power supply for supplying power to a load that switches between an active state and a standby state is disclosed. The constant voltage power supply includes first and second constant voltage circuits different in transient response and current consumption. The input of each of the first and second constant voltage circuits is connected to the input terminal of the constant voltage power supply, and the output of each of the first and second constant voltage circuits is connected to the output terminal of the constant voltage power supply. A switching signal generation circuit outputs a switching signal so as to cause the first operational amplifier to operate when the load is in the active state, and to cause the second operational amplifier to operate when the load is in the standby state.

A timing device includes a counter that performs counting action in synchronization with pulses in a clock signal to generate a 6-bit count value representing decimal numbers “0” to “39” in each count cycle in order to perform counting action on a 1 / 100-second basis and an output control circuit that outputs upper 4 bits of the count value generated by the counter as 4-bit timed data representing time on a 1 / 1000-second basis.

Known pumping devices have a connection lid, a connection cap slipped over the connection lid, a hollow chamber formed between the connection lid and the connection cap, and electrical connections that extend through the connection cap into the hollow chamber. It is disadvantageous that when fuels containing water are being pumped, such as ethanol, corrosion can occur at the electrical connections and at the uninsulated cable segments that are exposed to fuel near the electrical connections, for instance at the electrical coils or flexible cables of the carbon brushes, and in the final analysis this leads to an interruption in the electrical contact and thus to failure of the pumping device. In the electrical device of the invention, corrosion of the electrical connections and of the electrical components adjoining them upstream and downstream is avoided entirely or at least greatly diminished. According to the invention, the electrical connections are each provided in separate chambers of the hollow chamber.

The present invention is a PSRAM in which a burst length can be increased without increasing consumed current, and a burst operation method therefor. In operation, column selection lines CSL1 and CSL2 are driven in order during activation of sense amplifiers. This causes bit switches BSW1-BSW8 to be turned on in units of four bit switches and then 8-bit read data RD is latched from bit line pairs BL1-BL8 into prefetch / preload latches PFPLL1-PFPLL8 in units of 4-bits. The 8-bit read data RD is continuously output to a single data I / O bus I / O1 in units of one bit and in order.

The present invention relates to an integrated electrical circuit in particular a receiver or driver suitable for broadband communication, such as optical interconnect. The circuit comprises two amplifiers which share current supply wherein the integrated circuit is arranged so that cross talk via this current supply is avoided over a large range of frequencies.

There is disclosed a phase detector which triggers on both rising and falling edges of an input pulse signal. This effectively doubles the frequency of the input signal. When the phase detector is used in a phase locked loop, the doubled frequency means that a lower division ratio can be used, thereby reducing any noise contribution introduced thereby.

A display voltage generating circuit (2-1) for generating display voltages needed to drive an LCD has switches (SW1-1 to SW1-5), of which each has one end connected to one of capacitors (C1 to C5) for smoothing display voltages (V1 to V5) and has the other end connected through one of resistors (R11 to R15) to a supplied voltage (VCC). By an output from a timer (T-1), the switches are kept on for a predetermined period after electric power starts being supplied, so that the capacitors are charged with the supply voltage.

A display voltage generating circuit (2-1) for generating display voltages needed to drive an LCD has switches (SW1-1 to SW1-5), of which each has one end connected to one of capacitors (C1 to C5) for smoothing display voltages (V1 to V5) and has the other end connected through one of resistors (R11 to R15) to a supplied voltage (VCC). By an output from a timer (T-1), the switches are kept on for a predetermined period after electric power starts being supplied, so that the capacitors are charged with the supply voltage.

The invention relates to an electrode boiler adopting the current control manner. The electrode boiler adopting the current control manner is a small electrode boiler capable of implementing the current control manner, and the electrode boiler is of a structure that fossilized water is utilized as an electrolyte solution, water in a water pipe is heated, electrode bars and a warm water pump are arranged, water enters from a water inlet pipe and is discharged out of a water outlet pipe, and a cycle is formed. The multiple electrode bars are arranged in the water pipe, the area of the electrode bars is adjusted from various outer electric heating pipes, the resistance is changed, and accordingly current consumption is controlled. According to the provided electrode boiler adopting the current control manner, the electrode bars arranged in the water pipe can be adjusted, the resistance is adjusted by controlling increasing and decreasing of the area of the electrode bars, and the beneficial effects that equipment cost is not increased, the equipment size is not increased, and the current can be accurately and simply controlled are achieved.

An internal step-down power supply circuit has an internal step-down power-supply output node, a driver, a divider circuit and a current mirror circuit. The internal node provides an internal step-down power supply potential. The driver adjusts an external power-supply potential and provides an adjusted external power-supply potential to the internal node. The divider circuit divides a voltage that appears on the internal node and provides a divided voltage. The current mirror circuit is connected to the divider circuit. The current mirror circuit compares the voltage provided by the divider circuit and a reference voltage. The current mirror circuit sets the conductance of a first transistor feeding a current in response to the reference voltage to n times of the conductance of a second transistor feeding a current in response to the voltage provided from the divider circuit, wherein n is greater than 1.

The invention relates to a battery module. The battery is provided with a plurality of battery cells (2), the battery cells are respectively provided with a first voltage tap (31) on a first side surface (21) and a second voltage tap (32) on a second side surface (22) opposite to the first side surface (21). Wherein the battery cells (2) are arranged in a plurality of branch lines (4) of the battery module (1), and the battery cells (2) of the branch lines (4) are arranged alternately in the longitudinal direction (7) of the respective branch line (4).

The invention discloses an alternating signal sampling device and an implementation method of the alternating signal sampling device. The alternating signal sampling device comprises a rectifier bridge and a processor, wherein the rectifier bridge is connected with an input alternating signal, and the processor is connected with the alternating signal and the rectifier bridge. The processor comprises an analog-to-digital converter (ADC) module, a comparator and a central processing unit (CPU), wherein the ADC module is connected with the rectifier bridge, the comparator is connected with the alternating signal, and the CPU is connected with the ADC module and the comparator. The rectifier bridge is used for rectifying the alternating signal into a full-wave rectified signal containing positive voltage. The comparator is used for outputting corresponding high level and low level according to the positive voltage and the negative voltage of the alternating signal. The ADC module is used for converting the full-wave rectified signal into a digital quantity full-wave rectified signal and sampling the digital quantity full-wave rectified signal to generate a corresponding sampling value. The CPU is used for conducting sign bit processing on the sampling value according to the high level and the low level to obtain the original alternating signal. Through the rectifier bridge and the comparator in the processor, the purpose of collecting alternating signals is achieved, and power consumption and cost are lowered.

An internal step-down power supply circuit has an internal step-down power-supply output node, a driver, a divider circuit and a current mirror circuit. The internal node provides an internal step-down power supply potential. The driver adjusts an external power-supply potential and provides an adjusted external power-supply potential to the internal node. The divider circuit divides a voltage that appears on the internal node and provides a divided voltage. The current mirror circuit is connected to the divider circuit. The current mirror circuit compares the voltage provided by the divider circuit and a reference voltage. The current mirror circuit sets the conductance of a first transistor feeding a current in response to the reference voltage to n times of the conductance of a second transistor feeding a current in response to the voltage provided from the divider circuit, wherein n is greater than 1.