Datagram segmentation and reassembly system and realization method for onboard switching module

A switching module and reorganization system technology, applied in the field of communication, can solve the problems of increased processing delay and jitter, low utilization rate of switching structure, large storage resources, etc., to reduce processing delay and jitter, improve forwarding efficiency, and distribute uniform effect

Active Publication Date: 2011-08-24
XIAN INSTITUE OF SPACE RADIO TECH
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0007] 1) It needs to occupy a lot of storage resources;
[0008] 2) The processing delay and jitter are greatly increased;
[0009] 3) The utilization rate of the switching fabric is not high

Method used

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  • Datagram segmentation and reassembly system and realization method for onboard switching module
  • Datagram segmentation and reassembly system and realization method for onboard switching module
  • Datagram segmentation and reassembly system and realization method for onboard switching module

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Embodiment Construction

[0051] Below in conjunction with accompanying drawing and specific embodiment, the present invention is described in further detail:

[0052] like figure 2 Shown is a schematic diagram of the datagram segmentation and reorganization system structure of the present invention, image 3 It is a schematic structural diagram of the datagram segmentation module of the present invention; Figure 4 It is a schematic structural diagram of the datagram reorganization module of the present invention, which is composed of figure 2 It can be known that the datagram segmentation and reassembly system includes a datagram segmentation module, a switching module and a datagram reassembly module.

[0053] Depend on image 3 It can be known that the datagram fragmentation module includes an input buffer, an input processor, a fragmenter and a forwarding table querier, wherein the input buffer receives and buffers the externally input datagram. The input processor strips the preamble and fr...

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Abstract

The invention relates to a datagram segmentation and reassembly system and a realization method for an onboard switching module. The system comprises a datagram segmentation module, a switching module and a datagram reassembly module, wherein the datagram segmentation module splits a preamble and frame starting information carried in a datagram from the datagram, segments the split datagram, determines an output port of the datagram according to extracted forwarding information, and outputs the segmented datagram and the information of the output port to the switching module; the switching module outputs the segmented datagram to the data reassembly module from a corresponding port; and the data reassembly module receives the segmented datagram output by the switching module, and performs the reassembly of the datagram. The system increases the utilization rate of a memory space, simultaneously reduces the memory space required by the reassembly of the output port, greatly reduces the usage of a cache in a switching structure, reduces processing delay and jitter, and improves the forwarding efficiency of the switching structure.

Description

technical field [0001] The invention relates to a datagram segmentation and reorganization system and an implementation method of an on-board switching module, and belongs to the technical field of communication. Background technique [0002] The packet-based communication system transmits information through switching modules in the network, and the switching modules in the network send packets from different input ports to different output ports according to the destination addresses contained in the packets. like figure 1 As shown, the switching module includes three parts: incoming line processing module, switching module and outgoing line processing module. The incoming line processing module is responsible for receiving and processing packets, and the switching module sends them to different outgoing line processing modules and outgoing lines according to their destination addresses. The processing module is responsible for completing outgoing processing and packet se...

Claims

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Application Information

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IPC IPC(8): H04L12/56H04L1/00H04L47/76
Inventor 呼延烺周诠黎军李敏奇张怡李静玲王洋沈俊
Owner XIAN INSTITUE OF SPACE RADIO TECH
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