Vertical foldaway memory array structure

A memory array, foldable technology, applied in the field of vertical foldable flash memory array structure, can solve the problems of SONOS flash memory technology and complex control methods, etc., achieve high-density and large-capacity storage capacity, simple structure, and simplified production The effect of the manufacturing process

Inactive Publication Date: 2011-09-14
TSINGHUA UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0006] The shortcoming that prior art exists is, image 3 The technology and control methods of SONOS flash memory in vertical series are relatively complicated, so it is urgent to improve

Method used

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  • Vertical foldaway memory array structure
  • Vertical foldaway memory array structure
  • Vertical foldaway memory array structure

Examples

Experimental program
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Effect test

Embodiment 1

[0042] In an embodiment of the present invention, the proposed vertically foldable memory array structure includes: vertically foldable memory modules distributed in columns and rows, the vertically foldable memory modules include drain selection transistors, bottom connection lines and source selection transistors, and A plurality of memory cell transistors connected between the drain selection transistor and the bottom connection line and between the source selection transistor and the bottom connection line, wherein the gate structure of each memory cell transistor is connected to the A word line is connected, the drain of each said drain selection transistor is connected to a bit line, and the drain of the drain selection transistor in the Mth vertical folding memory module in the Nth column is connected to the Mth of the N+1th column -The sources of the source selection transistors in one vertically foldable memory module are all connected to the same bit line, and the gat...

Embodiment 2

[0060] The vertically folded memory structure according to Embodiment 2 of the present invention includes: memory cell transistor groups distributed in columns and rows, the memory cell transistor group includes a plurality of memory cell transistors, wherein each of the memory cell transistors has a gate structure Connected to a word line; a plurality of drain selection transistors and a plurality of source selection transistors, wherein each of the memory cell transistor groups in the Nth column is connected to a drain selection transistor, and the memory cell transistor group in the N+1th column Each of them is connected to a source selection transistor; a plurality of bottom selection transistors, and the bottom selection line connects the memory cell transistor group in the Mth row of the Nth column and the M+1th row of the N+1th column Between the memory cell transistor groups of the rows, wherein, the drains of the drain selection transistors and the source electrodes of...

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PUM

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Abstract

The invention discloses a vertical foldaway memory array structure. The structure comprises vertical foldaway memory modules and a plurality of memory unit tubes; the vertical foldaway memory modules are in line and row distribution; each vertical foldaway memory module comprises a drain selection tube, a bottom connection wire and a source selection tube; the grid structure of each storage unit tube is connected with a word line; the drain of each drain selection tube is connected with a bit line; the drain of the drain selection tube of the Mth vertical foldaway memory module in the Nth line and the source of the source selection tube in the (M-1)th vertical foldaway memory module in the (N+1)th line are connected with the same bit line; and the grids of the drain selection tubes and the source selection tubes of all vertical foldaway memory modules in the N lines are respectively connected with the same drain selection line and the same source selection line. The vertical foldaway memory array structure disclosed by the embodiment of the invention not only has a simple structure and but also is very suitable for the three-dimensional integration of memories, so that the high-density high-capacity storage capacity of the vertical foldaway memory structure is greatly improved.

Description

technical field [0001] The invention relates to the technical field of semiconductor design and manufacture, in particular to a vertically foldable flash memory array structure. Background technique [0002] Flash memory has the characteristic that the stored data will not be lost after power failure, and is especially suitable for fields such as mobile communication and computer storage components. Some flash memories also have high-density storage capabilities, and are suitable for applications such as large-capacity mobile storage media. The SONOS flash memory has a silicon-oxide-nitride-oxide-silicon structure, including a tunnel oxide layer, a silicon nitride layer and a blocking oxide layer. SONOS-type flash memory uses quantum tunneling effect or hot carrier injection effect to inject charges (electrons or holes) into the silicon nitride layer through the tunneling oxide layer, and are captured by charge traps in the silicon nitride layer, thereby It causes the chan...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G11C5/02H01L27/115
CPCH01L29/7926G11C5/02H01L27/0688H01L27/11582G11C16/0466H01L29/792G11C16/0483G11C8/14G11C5/063H10B43/27
Inventor 潘立阳袁方
Owner TSINGHUA UNIV
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