Cathode patterns of electric semiconductor device and patterned arrangement method of cathode fingers thereof

Abstract

The invention discloses cathode patterns of an electric semiconductor device and a patterned arrangement method of cathode fingers thereof, which are widely applied in the design of cathode patterns in an electric semiconductor, an electric electronic device, an all-controlled thyristor and the like. The cathode patterns comprises equant sector areas and concentric rings which are divided with a circle centre as an axle; the intersecting places of the sector areas and the concentric rings are pattern units; fingers distributed in the sector areas and located in one ring are arranged along a circle arc of the ring; the outer edge lines of each circle of fingers are circular arcs; and the directions of the fingers are all parallel to the centre lines of the sector areas; and gate pole fast channels are left between adjacent two sector areas. The cathode patterns are transferred to the surfaces of chips by photoetching the designed photomask plates to finish the final manufacturing. According to the cathode patterns and the patterned arrangement method of the cathode fingers thereof, the utilization rate of the effective areas of the chips is increased; the opening / closing uniformityof each finger is improved; the balancing of the opening / closing difference of the fingers, caused by the distance from gate pole electrodes is facilitated; and the machining formation is conveniently realized.

Description

technical field [0001] The invention relates to a power semiconductor device in the field of semiconductor devices and a design method thereof, in particular to a cathode pattern and a method for arranging the cathode comb pattern applied to power semiconductors, power electronic devices, fully-controlled thyristors, and the like. Background technique [0002] Cathode pattern design is the basic link in the design of various electronic devices, especially for fully controlled thyristors. The cathode pattern of the fully-controlled thyristor is complementary to the gate pattern, and directly affects the dynamic parameters of the device, so the graphic design of the fully-controlled thyristor must be cautious. Generally, after balancing the various parameters of the device, a rough graphic is designed, and the final graphic is determined by combining the designer's aesthetic style and the graphic characteristics of the company. The designed pattern is then transferred to the ...

AI Technical Summary

Problems solved by technology

However, each partition has a waste of irregular areas at the junction of rectangles and arcs, which reduces the utilization rate of the chip area, and the waste increases with the increase of the graphic radius, which is not suitable for large-diameter full-control devices

[0007] It can be seen from the above that the three comb arrangement methods have their own advantages and disadvantages, so the development of a cathode pattern of semiconductor devices with high chip area ratio, easy processing and molding, and suitable for various sizes and gate configurations become an urgent problem to be solved

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