Delay signal generating circuit
A technology for generating circuits and delaying signals, applied in the field of signal delay, can solve problems such as high circuit power consumption, and achieve the effect of reducing dynamic power consumption
Active Publication Date: 2011-10-12
ANYKA (GUANGZHOU) MICROELECTRONICS TECH CO LTD
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The invention relates to a signal delay technology and provides a delay signal generating circuit aiming at the defect of over-high power consumption of the conventional delay signal generating circuit. The delay signal generating circuit comprises a comparison circuit, a clock switching circuit and a D trigger, wherein the comparison circuit comprises input ends, wherein the first input end is connected with a signal source and the second input end is connected with the output end of the D trigger; the output end of the comparison circuit is connected with the control end of the clock switching circuit; the input end of the clock switching circuit is connected with a clock source, and the output end of the clock switching circuit is connected with the clock end of the D trigger; the dataend of the D trigger is connected with the signal source corresponding to the trigger; when levels of the first input end and the second input end of the comparison circuit are equal, invalid level is output; when the level at the control end of the clock switching circuit is valid level, clock pulse is output at the output end of the clock switching circuit; and when the level at the control endof the clock switching circuit is invalid level, constant level is output at the output end of the clock switching circuit. The dynamic power consumption of the delay signal generating circuit can begreatly reduced.
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