Silicon controlled rectifier used for ESD protection

A technology of electrostatic protection and thyristor, applied in circuits, electrical components, electric solid devices, etc., can solve the problems of high turn-on voltage, failure of gate oxide protection, slow thyristor opening speed, etc. Uniform, device robustness, and quick response

Inactive Publication Date: 2011-10-19
ZHEJIANG UNIV
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

However, the SCR also has the disadvantages of slow opening speed and high opening voltage, which cannot eff

Method used

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  • Silicon controlled rectifier used for ESD protection
  • Silicon controlled rectifier used for ESD protection
  • Silicon controlled rectifier used for ESD protection

Examples

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Embodiment Construction

[0026] The structure of P well, N well, N+, P+ injection region, PMOS, NMOS and isolation resistance in the present invention can all be realized by using the existing standard CMOS integrated circuit manufacturing process.

[0027] Such as Figure 1-3 As shown, a thyristor with an electrostatic protection structure includes a pull-up thyristor 11, a pull-down thyristor 12, an isolation resistor 13, an NMOS transistor 14, and a PMOS transistor 15. The pull-up thyristor 11 includes a first N well 21 and a first P well 22, wherein the first N well 21 has a first P+ implantation region 23 and a first N+ implantation region 24 respectively, and the first P well 22 has a second P+ implantation region respectively 25 and the second N+ implantation region 26;

[0028] The pull-down thyristor 12 includes a second N well 31 and a second P well 32, wherein the second N well 31 has a third P+ injection region 33 and a third N+ implant region 34 respectively, and the second P well 32 has...

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Abstract

The invention discloses a silicon controlled rectifier used for ESD protection. The silicon controlled rectifier includes a pull-up silicon controlled rectifier, a pull-down silicon controlled rectifier, an isolation resistor, a NMOS transistor and a PMOS transistor. The pull-up silicon controlled rectifier comprises a first N well, which consists of a first P+ implanted region and a first N+ implanted region, and a first P well, which consists of a second P+ implanted region and a second N+ implanted region. The pull-down silicon controlled rectifier comprises a second N well, which consists of a third P+ implanted region and a third N+ implanted region, and a second P well, which consists of a fourth P+ implanted region and a fourth N+ implanted region. In the invention, a voltage clamp structure is formed through a PN diode structure and a well resistance structure which are parasitic on the silicon controlled rectifier; fast response of an ESD pulse and preopening of a protective structure can be achieved. By using the invention, opening speed is fast, weak gate oxide layer can be protected from instant and quick ESD static shock.

Description

technical field [0001] The invention belongs to the field of integrated circuits, in particular to a thyristor for improving the reliability and static power consumption of an integrated circuit ESD protection device based on a thyristor. Background technique [0002] The phenomenon of electrostatic discharge (ESD) in nature poses a serious threat to the reliability of integrated circuits. In the industry, 30% of the failures of integrated circuit products are caused by electrostatic discharge, and the increasingly smaller process size and thinner gate oxide thickness greatly increase the probability of integrated circuit damage by electrostatic discharge. Therefore, improving the reliability of integrated circuit electrostatic discharge protection has a non-negligible effect on improving the yield of products. [0003] The modes of electrostatic discharge phenomena are usually divided into four types: HBM (Human Body Model), MM (Machine Discharge Model), CDM (Component Cha...

Claims

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Application Information

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IPC IPC(8): H01L27/02H01L29/74
Inventor 董树荣苗萌吴健范鸿燕
Owner ZHEJIANG UNIV
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