Power semiconductor device

Abstract

The invention discloses a power semiconductor device which is provided with a dummy region at the edge of an active region; UIS (unit identification system) test shows that defective pixels occur irregularity and are randomly distributed in the active region of the power semiconductor device, that is to say, the avalanche characteristic of the power semiconductor device is reinforced effectively after the dummy region is introduced.

Description

technical field [0001] The invention relates to a power semiconductor device. In particular, it relates to the cell structure and device configuration of trench metal oxide semiconductor field effect transistor (MOSFET) and trench insulated gate bipolar transistor (IGBT). Background technique [0002] In the field of power semiconductor devices, the method of unclamped inductive switching test (UIS test) is usually used to measure the UIS current of the device at the breakdown voltage to evaluate the quality of the avalanche characteristics of the power semiconductor device. However, refer to Figure 1A to Figure 1C It can be found that after performing UIS tests on trench MOSFETs in the prior art, dead pixels always appear near the edge of the active area (active area), thereby affecting the trench MOSFET. The avalanche properties of , will be explained in detail below. [0003] Figure 1A A top view of a trench MOSFET disclosed in the prior art, Figure 1B It is a cros...

AI Technical Summary

Problems solved by technology

refer to Figure 1A It can be seen that the device unit is closest to the gate metal pad and the gate metal connection line. When the gate bias voltage is gradually increased to open the conductive channel, the gate of the device unit closest to the edge of the active region The pole is turned on first, which leads to the first turn on of the parasitic triode near the edge of the active region, which weakens the avalanche characteristics of the semiconductor device.

In addition, this results in lower measured UIS current values ​​and a wider current distribution at breakdown voltage conditions (see image 3 )

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