Method for testing time series data of standard unit

Abstract

The invention discloses a method for testing time series data of a standard unit. The method comprises the following steps that: an external clock signal CLK_IN and an external clock selection signal OSC_sel are connected with a clock self-generating module respectively; an output end CLK_out of the clock self-generating module is connected with a clock end LOGIC_clk of a test logic circuit; a test stimulus TEST_in generated by a testability structure design module is connected with the test logic circuit; and the test logic circuit outputs result data TEST_out generated according to the test stimulus TEST_in to the testability structure design module so as to determine the working correctness of the test logic circuit. By the method, the limit working frequency of the circuit is tested by designing a self-generating frequency-modulated clock so as to capture a method of key routes.

Description

Technical field: [0001] The invention belongs to the field of microelectronics and relates to a method for testing time series data in standard cell library design. Background technique: [0002] As the scale of integrated circuit design becomes larger and the division of labor in the design process becomes more and more clear, more and more ultra-large-scale digital and digital-analog mixed circuit designs adopt semi-custom design methods based on cell libraries and IP (Intellectual Property) libraries accomplish. In the circuit design process, the design company first selects the process manufacturer, and selects the process, cell library version and various digital and analog IPs according to the needs. The design company does not need to worry about the functions, performance parameters and parameter accuracy of the cell library and IP library. These are provided and responsible by the process manufacturer, and the designer only calls the timing model and physical model...

AI Technical Summary

Problems solved by technology

[0005] The disadvantages of ring vibration and counter test circuits are that the data types obtained by the test are single, the amount of data is small, and the test structure is not scalable. The test data obtained by the circuit in a special working state does not meet the analysis needs. influence, the test data of ring oscillator and counter circuit is too simple

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