A SoC verification method and debugging tool for radio frequency signals

A radio frequency signal and verification method technology, applied in the field of single-chip system debugging and verification, can solve problems such as inability to approach verification results, interference, and inability to flexibly adjust electronic tuners and demodulators, so as to reduce development risks and improve efficiency. , The effect of convenient debugging work

Inactive Publication Date: 2011-11-30
HISENSE HIVIEW TECH CO LTD
View PDF7 Cites 4 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Due to the differences in circuits and the extension of wiring, there are often different interferences during verification, and due to the limitations of the complete machine product, it is not possible to flexibly adjust the corresponding parameter settings of the electronic tuner and demodulator, resulting in the inability to approach the real Validation results

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • A SoC verification method and debugging tool for radio frequency signals
  • A SoC verification method and debugging tool for radio frequency signals
  • A SoC verification method and debugging tool for radio frequency signals

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0029] Embodiment one, see figure 1 As shown, the debugging tool of this embodiment uses an electronic tuner and a demodulator to build a radio frequency demodulation module. The electronic tuner can be a digital-analog integrated tuner or a digital and analog tuner, which receives the radio frequency signal RF and converts it into a digital intermediate frequency signal D-IF and an analog intermediate frequency signal IF and transmits it to the demodulator. The demodulator can be equipped with a digital demodulator and an analog demodulator at the same time, and the digital demodulator receives the digital intermediate frequency signal D-IF, converts it into a TS stream and transmits it to the corresponding pin of the FPGA interface; the analog demodulator receives the analog intermediate frequency signal D-IF The signal IF is converted into a mixed video broadcast signal CVBS and transmitted to the corresponding pins of the FPGA interface. According to the debugging and ver...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

PUM

No PUM Login to view more

Abstract

The invention discloses a SOC verification method and a debugging tool for radio frequency signals. First, a radio frequency demodulation module and an FPGA interface are used to construct a debugging tool; secondly, the debugging tool is connected to an FPGA verification platform of the SOC; then, the control The RF demodulation module on the debugging tool receives the RF signal and converts it into a CVBS signal or TS stream, and outputs it to the FPGA verification platform through the FPGA interface; the FPGA verification platform uses the received CVBS signal or the TS stream to debug the SOC system verify. The invention uses a specially designed debugging tool to verify the FPGA verification platform, thereby improving the efficiency of SOC chip development and verification in the early stage and ensuring the authenticity of the verification. In addition, the function modules on the debugging tool and the verification platform can also be debugged through the test interface reserved on the debugging tool, which facilitates the debugging work.

Description

technical field [0001] The invention belongs to the technical field of debugging and verification of a single-chip system, and in particular relates to a verification method and a debugging tool for a system single-chip SOC for radio frequency signals. Background technique [0002] In the current TV receiving system, the video decoding main chip integrated with CPU is the core of the whole system. With the development of electronic design and manufacturing technology, integrated circuit design has developed from the integration of transistors to the integration of logic gates, and now to the integration of IP, that is, System-on-Chip (SOC) design technology. The use of SOC to design system circuits can effectively reduce the development cost of electronic / information system products, shorten the development cycle, and improve the competitiveness of products. Therefore, it is the most important product development method that will be generally adopted by the industry in the f...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

Application Information

Patent Timeline
no application Login to view more
Patent Type & Authority Applications(China)
IPC IPC(8): H04N17/00H04N5/455
Inventor 杨元成
Owner HISENSE HIVIEW TECH CO LTD
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Try Eureka
PatSnap group products