QFN (quad flat non-lead) package with multiple circles of pins and manufacturing method thereof

Abstract

The invention discloses a QFN (quad flat non-lead) package with multiple circles of pins and a manufacturing method thereof. The package comprises a lead frame, metal material layers, an IC (integrated circuit) chip, an insulated filling material, an adhesive material, metal conductors and a plastic package material, wherein the lead frame comprises a chip carrier and multiple pins which are arranged around the chip carrier for multiple circles; the metal material layers are arranged on the upper surface and lower surface of the lead frame; the IC chip is arranged on the metal material layer on the upper surface of the lead frame; the insulated filling material is arranged below a stepped structure of the lead frame; the adhesive material is arranged between the IC chip and the metal material layer on the upper surface of the lead frame; the IC chip is respectively connected with inner pins of the multiple circles of pins and the upper surface of the chip carrier by the metal conductors; and the plastic package material coats and seals the IC chip, the adhesive material, the metal conductors, parts of regions of the lead frame and parts of metal material layer. According to the invention, the bottleneck of the low I/O (input/output) quantity can be broken through, and the sealing reliability is improved.

Description

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AI Technical Summary

Benefits of technology

This patented technology allows for better placement of metallic leads within an electronic device's housing by creating step structures that increase their contact areas between them and other components such as conductors. These steps help keep water out without getting trapped under certain parts like solder joints. Additionally, this design prevents damage caused by external factors (such as impact) while also allowing for efficient use of space due to its small size. Overall, these technical improvements make it easier and more reliable to manufacturers produce high-quality electronics devices at competitive prices over conventional methods.

Problems solved by technology

This patented technical problem addressed in this patents relates to improving the quality, functionality, durability, flexibility, weight reduction, thinning, space utilizing capacity, production speed, and costs associated with semiconductor devices like integrated circuits (Integrated Circuit). Current methods involve attaching lead frames onto printed circuit boards (PCB), making them thinner than usual ones without any extra parts attached thereto, reducing their overall thicknesses, increasing cool resistance, lower resistances, enhancing signal transmission capabilities, protecting against damage caused by external factors like humid environments, allowing better temperature management, minimizing interference signals, maintaining long lifetimes, and ensures reliable operation over longer periods of time.

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